IP Library › Granted Patent US 9,188,491
Granted Patent B2
US 9,188,491 · App. 13/615,245 · Granted Nov 17, 2015

Semiconductor device including a temperature sensor circuit

Inventor: Dong Pan (Boise, ID)
Assignee: Micron Technology, Inc.
G01K7/01G01K7/16
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Quick Facts
Patent No.
US 9,188,491
App. No.
13/615,245
Granted
Nov 17, 2015
Kind
B2
Abstract

A semiconductor device including a temperature sensor includes a pull up circuit, a pull down circuit, a first additional current path, and a second additional current path. The pull up circuit is configured to generate a pull up current that contributes to generation of a first output current. The pull down circuit is operably coupled to the pull up circuit at an output node and configured to generate a pull down current that contributes to generation of a second output current. The first additional current path, when enabled, is configured to combine a first additional current with the pull up current to comprise the first output current. The second additional current path, when enabled, is configured to combine a second additional current with the pull down current to comprise the second output current. Respective enablement of the first additional current path and the second additional current path is complementary.

Claims (22)

1. A semiconductor device, comprising:

a temperature sensor including circuit elements a switch element and an output element, the temperature sensor configured to:

generate a variable pull up output current and a variable pull down output current that vary responsive to temperature change of the circuit elements;

alternatingly respectively switch additional pull up current and additional pull down current into the variable pull up output current and the variable pull down output current, respectively, as controlled according to a duty cycle that depends, at least in part, on a comparison of an output voltage to a reference voltage received by a comparator, the output voltage being generated at an output node of the circuit elements by the variable pull up output current and the variable pull down output current; and

generate a temperature estimate signal indicating a temperature responsive to the comparison of the output voltage to the reference voltage.

2. The semiconductor device of claim 1 , wherein average values of the variable pull up output current and the variable pull down output current are substantially equal.

3. The semiconductor device of claim 1 , wherein the circuit elements are configured such that the variable pull up output current and the variable pull down output current change with temperature at substantially the same rate.

4. The semiconductor device of claim 1 , further comprising a refresh controller in communication with the temperature sensor, the refresh controller configured to:

monitor a temperature estimate signal from the temperature sensor; and

modify, in response to the temperature estimate signal, a refresh rate of at least one memory device that includes the temperature sensor.

5. The semiconductor device of claim 1 , wherein the temperature sensor includes:

a pull up circuit configured to generate a pull up current (Ipup) that contributes to generation of the variable pull up output current (Ia);

a pull down circuit operably coupled to the pull up circuit, the pull down circuit configured to generate a pull down current (Ipdn) that contributes to generation of the variable pull down output current (Ib);

a first additional current path operably coupled to the output node of the circuit elements, wherein the first additional current path, when enabled, is configured to combine the additional pull up current with the pull up current (Ipup) to comprise the variable pull up output current (Ia); and

a second additional current path operably coupled to the output node, wherein the second additional current path, when enabled, is configured to combine the additional pull down current with the pull down current (Ipdn) to comprise the variable pull down output current (Ib).

6. The semiconductor device of claim 5 , wherein the first additional current, when the first additional current path is enabled, is approximately equal to the pull up current (Ipup), and wherein the second additional current, when the second additional current path is enabled, is approximately equal to the pull down current (Ipdn).

7. The semiconductor device of claim 6 , wherein the variable pull up output current (Ia) and the variable pull down output current (Ib) have average values approximately equal to:

Ia=Ipup+( 1 −Enbl)*Ipup; and

Ib=Ipdn+Enbl*Ipdn, wherein Enbl is a decimal equivalent of the percentage of time that the second additional current path is enabled, and (1−Enbl) is a decimal equivalent of the percentage of time that the first additional current path is enabled.

8. The semiconductor device of claim 7 , further configured to generate a temperature estimate signal in response to a result of the comparison of the output voltage at the output node and the reference voltage, wherein the temperature estimate signal is based, at least in part, on the number of times (Output Counts) that a single one of the first additional current path and the second additional current path is enabled for a full cycle of readings (Total Clocks).

9. The semiconductor device of claim 8 , wherein the Output Counts are approximately equal to Output Counts=Total Clocks*(2*Ipup−Ipdn)/ (Ipup+Ipdn).

10. The semiconductor device of claim 1 , further comprising an apparatus that incorporates the temperature sensor to which the temperature estimate signal is associated, wherein the apparatus is selected from the group consisting of a memory device, a semiconductor wafer, and an electronic system.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
Continuity (3)
Division 12818889 · Jun 18, 2010
Division 11839900 · Aug 16, 2007
Related Publication 20130003781A1 · Jan 3, 2013