Three-dimensional chip-to-wafer integration
An integrated circuit device is disclosed that includes a semiconductor substrate and a die attached to the semiconductor substrate. A conductive pillar is connected to at least one of the semiconductor substrate or the die. An overmold is molded onto the semiconductor substrate over the die, and the conductive pillar extends through the overmold.
1. A semiconductor device comprising:
a semiconductor substrate comprising a first die, the semiconductor substrate comprising electrical circuitry;
a second die attached to the semiconductor substrate, the second die attached to the semiconductor substrate in a face-down orientation, the second die comprising a die attach pad;
a third die attached to the second die in a face-up orientation, the third die attached to the die attach pad of the second die, the second die and the third die stacked in direct contact;
an overmold molded onto the semiconductor substrate over the second die and the third die;
a conductive pillar connected directly to at least one of the electrical circuitry of the semiconductor substrate, or the second die, or the third die, the conductive pillar extending through the overmold, wherein the footprint of the semiconductor device is the same as the footprint of the first die;
a redistribution layer formed on the overmold; and
a plurality of solder bumps formed on the redistribution layer, at least one of the plurality of solder bumps connected to the conductive pillar via the redistribution layer.
2. The semiconductor device as recited in claim 1 , wherein the semiconductor substrate and the second die comprise at least substantially the same coefficient of thermal expansion.
3. The semiconductor device as recited in claim 1 , wherein the first die comprises one of an analog component or a digital component and the second die comprises the other of an analog component or a digital component.
4. The semiconductor device as recited in claim 1 , wherein the conductive pillar furnishes electrical connection to the at least one of the semiconductor substrate or the second die.
5. The semiconductor device as recited in claim 1 , wherein the conductive pillar is configured to transfer heat from at least one of the semiconductor substrate or the second die.
6. The semiconductor device as recited in claim 1 , further comprising a heat sink coupled with a side of the semiconductor substrate opposite the second die.
7. A semiconductor device comprising:
a first die, the first die having electrical circuitry;
a second die attached to the first die, the second die attached to the first die in a face-down orientation, the second die comprising a die attach pad;
a third die attached to the second die in a face-up orientation, the third die attached to the die attach pad of the second die, the second die and the third die stacked in direct contact;
an overmold molded onto the first die over the second die and the third die;
a conductive pillar formed on at least one of the electrical circuitry of the first die, or the second die, or the third die, the conductive pillar extending through the overmold, wherein the footprint of the semiconductor device is the same as the footprint of the first die;
a redistribution layer formed on the overmold; and
a plurality of solder bumps formed on the redistribution layer, at least one of the plurality of solder bumps connected to the conductive pillar via the redistribution layer.
8. The semiconductor device as recited in claim 7 , wherein the first die and the second die comprise at least substantially the same coefficient of thermal expansion.