Semiconductor device and manufacturing method thereof
A semiconductor device is provided which includes an N-type semiconductor layer and a P-type semiconductor layer coexisting in the same wiring layer without influences on the properties of a semiconductor layer. The semiconductor device includes a first wiring layer with a first wiring, a second wiring layer with a second wiring, and first and second transistors provided in the first and second wiring layers. The first transistor includes a first gate electrode, a first gate insulating film, a first oxide semiconductor layer, a first hard mask layer, and first insulating sidewall films covering the sides of the first oxide semiconductor layer. The second transistor includes a second gate electrode, a second gate insulating film, a second oxide semiconductor layer, and a second hard mask layer.
1. A method for manufacturing a semiconductor device, comprising the steps of:
forming a cap insulating layer serving as a first gate insulating film and a second gate insulating film, over a first wiring layer having a first wiring formed therein as each of a first gate electrode and a second gate electrode in contact with the first gate electrode and the second gate electrode;
forming a first laminated structure of a first oxide semiconductor layer of a first conductive type and a first hard mask layer, over the first gate electrode via the cap insulating layer;
forming an insulating film to cover the first laminated structure and the cap insulating layer;
forming a first sidewall film to cover a side of the first oxide semiconductor layer by etching back the insulating film;
forming a second laminated structure of a second oxide semiconductor layer of a second conductive type other than the first conductive type and a second hard mask layer, over the second gate electrode via the cap insulating layer;
forming an interlayer insulating layer to cover the first laminated structure and the second laminated structure; and
forming source/drain electrodes coupled to the first oxide semiconductor layer and the second oxide semiconductor layer via the interlayer insulating layer, the first hard mask, and the second hard mask.
2. The manufacturing method of the semiconductor device according to claim 1 , wherein the first laminated structure and the second laminated structure differ from each other in material or property of the source/drain electrode.
3. The manufacturing method of the semiconductor device according to claim 2 ,
wherein one of the first oxide semiconductor layer and the second oxide semiconductor layer is a P-type oxide semiconductor layer, and
wherein the source/drain electrode has a contacting part to the P-type oxide semiconductor layer, said contacting part containing a conductive oxide or another P-type oxide semiconductor.
4. The manufacturing method of the semiconductor device according to claim 2 ,
wherein one of the first oxide semiconductor layer and the second oxide semiconductor layer is a P-type oxide semiconductor layer, and
wherein the source/drain electrode has a contacting part to the P-type oxide semiconductor layer, said contacting part being adapted to contain metal for forming an interface layer by partially modifying at least one of the P-type oxide semiconductor layer and the source/drain electrode.