IP Library › Granted Patent US 9,324,780
Granted Patent B2
US 9,324,780 · App. 14/069,864 · Granted Apr 26, 2016

Metal-insulator-metal (MIM) capacitor structure including redistribution layer

Inventors: Chi-Chung Jen (Kaohsiung, TW); Chia-Lun Hsu (Tainan, TW)
Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
H01L28/60H01L23/5223H01L2224/13
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Quick Facts
Patent No.
US 9,324,780
App. No.
14/069,864
Granted
Apr 26, 2016
Kind
B2
Abstract

Embodiments of mechanisms for forming a semiconductor device with metal-insulator-metal (MIM) capacitor structure are provided. The MIM capacitor structure includes a substrate; and a MIM capacitor formed on the substrate. The MIM capacitor includes a bottom electrode formed over the substrate. The bottom electrode is a top metal layer. The MIM capacitor also includes an insulating layer formed on the bottom electrode; and a top electrode formed on the insulating layer.

Claims (39)

1. A metal-insulator-metal (MIM) capacitor structure, comprising:

a substrate, wherein the substrate has a MIM region and a non-MIM region;

a MIM capacitor formed on the substrate in the MIM region, wherein the MIM capacitor comprises:

a bottom electrode formed over the substrate, wherein the bottom electrode is a first portion of a top metal layer, and the top metal layer is formed in an inter-metal dielectric (IMD) layer;

an insulating layer formed on the bottom electrode;

a top electrode formed on the insulating layer; and

a barrier layer formed over the top electrode; and

a redistribution layer (RDL) formed on a second portion of the top metal layer in the non-MIM region, wherein the RDL directly contacts both the top electrode and the second portion of the top metal layer.

2. The metal-insulator-metal (MIM) capacitor structure as claimed in claim 1 , wherein the insulating layer is formed in a first passivation layer.

3. The metal-insulator-metal (MIM) capacitor structure as claimed in claim 2 , further comprising:

a second passivation layer formed on the first passivation layer.

4. The metal-insulator-metal (MIM) capacitor structure as claimed in claim 2 , wherein a portion of the top electrode extends from inside of the first passivation layer to directly over a top surface of the first passivation layer.

5. The metal-insulator-metal (MIM) capacitor structure as claimed in claim 1 , further comprising:

a metal pad formed on a third portion of the top metal layer, wherein the metal pad is formed of a same material as the top electrode.

6. The metal-insulator-metal (MIM) capacitor structure as claimed in claim 5 , further comprising:

an under bump metallurgy (UBM) layer formed over the metal pad; and

a conductive element formed on the UBM layer.

7. The metal-insulator-metal (MIM) capacitor structure as claimed in claim 1 wherein the RDL is formed of a same material as the top electrode.

8. The metal-insulator-metal (MIM) capacitor structure as claimed in claim 7 , wherein the RDL extends from above a first passivation layer to the second portion of the top metal layer.

9. The metal-insulator-metal (MIM) capacitor structure as claimed in claim 1 , wherein the top electrode is made of copper (Cu), copper alloy, aluminum (Al), aluminum (Al) alloy, tungsten (W) or tungsten (W) alloy, or combinations thereof.

10. The metal-insulator-metal (MIM) capacitor structure as claimed in claim 1 , wherein the insulating layer is made of silicon oxide, silicon nitride, silicon glass or combinations thereof.

11. A metal-insulator-metal (MIM) capacitor structure, comprising:

a substrate, wherein the substrate has a MIM region and a non-MIM region; and

a MIM capacitor formed on the substrate in the MIM region, wherein the MIM capacitor comprises:

a top metal layer formed over the substrate and in an inter-metal dielectric (IMD) layer, wherein a first portion of the top metal layer is used as a bottom electrode of the MIM capacitor;

a dielectric layer formed on the bottom electrode;

a redistribution layer (RDL) formed on the dielectric layer in the MIM region, wherein the RDL formed on the dielectric layer in the MIM region is used as a top electrode of the MIM capacitor; and

a barrier layer formed over the top electrode; and

the RDL formed on a second portion of the top metal layer in the non-MIM region, wherein the RDL formed on the second portion of the top metal layer in the non-MIM region directly contacts both the top electrode and the second portion of the top metal layer.

12. The metal-insulator-metal (MIM) capacitor structure as claimed in claim 11 , wherein the dielectric layer is formed in a first passivation layer.

13. The metal-insulator-metal (MIM) capacitor structure as claimed in claim 12 , further comprising:

a second passivation layer formed on the RDL and the first passivation layer.

14. The metal-insulator-metal (MIM) capacitor structure as claimed in claim 11 , wherein the top metal layer is made of copper (Cu), copper alloy, aluminum (Al), aluminum (Al) alloy, tungsten (W) or tungsten (W) alloy, or combinations thereof.

15. The metal-insulator-metal (MIM) capacitor structure as claimed in claim 11 , wherein the dielectric layer is made of silicon oxide, silicon nitride, silicon glass or combinations thereof.

16. The metal-insulator-metal (MIM) capacitor structure as claimed in claim 11 , further comprising:

a metal pad formed on a third portion of the top metal layer, wherein the metal pad is formed of a same material as the top electrode.

17. The metal-insulator-metal (MIM) capacitor structure as claimed in claim 16 , further comprising:

an under bump metallurgy (UBM) layer formed over the metal pad; and

a conductive element formed on the UBM layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 27, 2013
From: JEN, CHI-CHUNG; HSU, CHIA-LUN
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 031688/0690 →
Continuity (1)
Related Publication 20150123242A1 · May 7, 2015