IP Library Granted Patent US 9,397,155
Granted Patent B2
US 9,397,155 · App. 14/946,465 · Granted Jul 19, 2016

Silicon carbide semiconductor device

Inventors: Keiji Wada (Osaka, JP); Toru Hiyoshi (Osaka, JP); Masaki Furumai (Osaka, JP); Mitsuhiko Sakai (Osaka, JP); Kosuke Uchida (Osaka, JP)
Assignee: Sumitomo Electric Industries, Ltd.
H01L29/0623H01L29/1095H01L29/1608H01L29/47H01L29/7804
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Quick Facts
Patent No.
US 9,397,155
App. No.
14/946,465
Granted
Jul 19, 2016
Kind
B2
Abstract

A silicon carbide semiconductor device includes a silicon carbide layer, an element region including a semiconductor element portion formed in the silicon carbide layer, a JTE region (first electric field relaxing region), an insulating film disposed on a first main surface and covering the JTE region, and a pad electrode electrically connected to the JTE region. The pad electrode includes an extension portion extending from an end of the JTE region close to the element region in a peripheral direction from the element region toward the JTE region, the extension portion being disposed on the insulating film. The extension portion overlies at least a portion of the JTE region.

Claims (40)

1. A silicon carbide semiconductor device comprising:

a silicon carbide layer including a first main surface and a second main surface located opposite said first main surface, said silicon carbide layer being made of hexagonal silicon carbide of polytype 4H and having a first conductivity type;

an element region including a semiconductor element portion formed in said silicon carbide layer;

a first electric field relaxing region having a second conductivity type different from said first conductivity type, said first electric field relaxing region being disposed in said silicon carbide layer so as to be in contact with said first main surface of said silicon carbide layer and so as to surround said element region when viewed two-dimensionally;

an insulating film disposed on said first main surface and covering said first electric field relaxing region; and

an electrode electrically connected to said first electric field relaxing region,

said electrode including an extension portion extending from an end of said first electric field relaxing region close to said element region in a peripheral direction from said element region toward said first electric field relaxing region, said extension portion being disposed on said insulating film,

said extension portion overlying at least a portion of said first electric field relaxing region.

2. The silicon carbide semiconductor device according to claim 1 , further comprising a second electric field relaxing region disposed in said silicon carbide layer so as to surround said first electric field relaxing region when viewed two-dimensionally, said second electric field relaxing region having said second conductivity type.

3. The silicon carbide semiconductor device according to claim 2 , wherein

said insulating film is disposed on said first main surface of said silicon carbide layer so as to cover said first electric field relaxing region and said second electric field relaxing region, and

said extension portion of said electrode extends from said end of said first electric field relaxing region so as to overlie said first electric field relaxing region and at least a portion of said second electric field relaxing region.

4. The silicon carbide semiconductor device according to claim 1 , wherein

a width of said extension portion from said end of said first electric field relaxing region along said peripheral direction is not less than 5 μm.

5. The silicon carbide semiconductor device according to claim 4 , wherein

said width of said extension portion from said end of said first electric field relaxing region along said peripheral direction is not less than 9 μm.

6. The silicon carbide semiconductor device according to claim 1 , wherein

a width of said first electric field relaxing region along said peripheral direction is not less than 5 μm.

7. The silicon carbide semiconductor device according to claim 6 , wherein

said width of said first electric field relaxing region along said peripheral direction is not less than 15 μm and not more than 50 μm.

8. The silicon carbide semiconductor device according to claim 1 , wherein

a dose amount of an impurity contained in said first electric field relaxing region is within a range of not less than 1×10 13 cm −2 and not more than 2×10 13 cm −2 .

9. The silicon carbide semiconductor device according to claim 8 , wherein

said dose amount of said impurity contained in said first electric field relaxing region is within a range of not less than 1.65×10 13 cm −2 and not more than 2×10 13 cm −2 .

10. The silicon carbide semiconductor device according to claim 1 , wherein

an impurity concentration in said first electric field relaxing region varies in stages along said peripheral direction.

11. The silicon carbide semiconductor device according to claim 2 , wherein

said second electric field relaxing region includes a plurality of regions disposed at a distance from each other, and

said extension portion is disposed on said insulating film so as to overlie at least a portion of a first region closest to said first electric field relaxing region of said plurality of regions.

12. The silicon carbide semiconductor device according to claim 11 , wherein

at least one of widths of said plurality of regions and impurity concentrations in said plurality of regions along said peripheral direction varies in stages between said plurality of regions.

13. The silicon carbide semiconductor device according to claim 1 , wherein

said semiconductor element portion includes a transistor element, said transistor element including a body region, said body region having said second conductivity type, being disposed in said silicon carbide layer, and being electrically connected to said first electric field relaxing region, and

an impurity concentration in said first electric field relaxing region is lower than an impurity concentration in said body region.

14. The silicon carbide semiconductor device according to claim 1 , wherein

said electrode includes a Schottky electrode in Schottky contact with said silicon carbide layer.

15. The silicon carbide semiconductor device according to claim 1 , wherein

said semiconductor element portion includes a second conductivity type impurity region, said second conductivity type impurity region being disposed in said silicon carbide layer, having said second conductivity type, and forming a diode together with said silicon carbide layer,

said electrode includes a diode electrode electrically connected to said second conductivity type impurity region, and

an impurity concentration in said first electric field relaxing region is lower than an impurity concentration in said second conductivity type impurity region.

Assignments (2)
NUNC PRO TUNC ASSIGNMENT Recorded Jul 1, 2026
From: SUMITOMO ELECTRIC INDUSTRIES, LTD.
To: MITSUMI ELECTRIC CO., LTD.
Reel/Frame 075871/0320 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 19, 2015
From: WADA, KEIJI; HIYOSHI, TORU; FURUMAI, MASAKI; SAKAI, MITSUHIKO; UCHIDA, KOSUKE
To: SUMITOMO ELECTRIC INDUSTRIES, LTD.
Reel/Frame 037093/0353 →
Priority Claims (2)
JP 2014-105489 · May 21, 2014 · national
JP 2014-105490 · May 21, 2014 · national
Continuity (2)
Continuation 14692458 · Apr 21, 2015
Related Publication 20160079349A1 · Mar 17, 2016