RRAM cell structure with laterally offset BEVA/TEVA

1. A method of forming a resistive random access memory (RRAM) device, comprising:

forming a bottom electrode over a bottom electrode via;

forming a variable resistive dielectric layer over the bottom electrode, wherein the variable resistive dielectric layer has an outermost sidewall that is aligned along a straight line with an outermost sidewall of the bottom electrode;

forming a top electrode over the variable resistive dielectric layer; and

forming a top electrode via vertically extending outward from an upper surface of the top electrode at a position centered along a first axis that is laterally offset from a second axis centered upon that the bottom electrode via, wherein the top electrode via has a smaller total width than the top electrode.

2. The method of claim 1 , further comprising:

forming sidewall spacers abutting opposing sides of the top electrode, wherein sidewalls of the top electrode via are laterally set back from the sidewall spacers.

3. The method of claim 1 , further comprising:

forming a dielectric protection layer over an inter-level dielectric layer laterally surrounding a conductive metal region, wherein the bottom electrode via extends into an opening extending through the dielectric protection layer at a location arranged over the conductive metal region.

4. The method of claim 3 , wherein the bottom electrode comprises a first recess overlying the opening in the dielectric protection layer and the top electrode comprises a second recess overlying the opening in the dielectric protection layer.

5. The method of claim 3 , wherein the bottom electrode comprises a recess extending into the opening arranged over the bottom electrode via.

6. The method of claim 5 , wherein the recess has a substantially flat lower surface.

7. The method of claim 1 , further comprising:

forming an insulating anti-reflective layer confined within a recess within the top electrode at a location laterally offset from the top electrode via, wherein the insulating anti-reflective layer has a top surface recessed below a top surface of the top electrode.

8. The method of claim 1 , wherein the top electrode is recessed to a position that is laterally between outer regions of the variable resistive dielectric layer.

9. The method of claim 1 , wherein the bottom electrode has rectangular shaped footprint.

10. The method of claim 1 , wherein the top electrode laterally overlaps the bottom electrode.

11. The method of claim 1 , wherein the top electrode comprises a first top electrode layer comprising titanium and a second top electrode layer overlying the first top electrode layer and comprising tantalum.

12. A method of forming a resistive random access memory (RRAM) device, comprising:

forming a bottom electrode over a bottom electrode via, wherein the bottom electrode comprises a recess overlying an opening in a dielectric protection layer surrounding the bottom electrode via;

forming a variable resistive dielectric layer over the bottom electrode;

forming a top electrode over the variable resistive dielectric layer;

forming sidewall spacers abutting opposing sides of the top electrode; and

forming a top electrode via having a smaller width than the top electrode and vertically extending outward from an upper surface of the top electrode at a position laterally offset from the recess.

13. The method of claim 12 ,

wherein the bottom electrode is centered along first axis that is laterally offset from a second axis that the top electrode is centered upon; and

wherein the top electrode laterally overlaps the bottom electrode.

14. The method of claim 12 , further comprising:

forming an insulating anti-reflective layer within a recess within the top electrode at a location laterally offset from the top electrode via.

15. The method of claim 12 , wherein sidewalls of the top electrode are aligned with outer edges of the sidewall spacers.

16. The method of claim 12 , wherein the top electrode is asymmetric with respect to the recess.

17. A method of forming a resistive random access memory (RRAM) device, comprising:

forming a bottom electrode layer over a bottom electrode via layer overlying a conductive metal region;

forming a variable resistive dielectric layer over the bottom electrode layer;

forming a top electrode layer over the variable resistive dielectric layer;

patterning the top electrode layer to form a top electrode;

forming sidewall spacers along sides of the top electrode;

patterning the bottom electrode layer and the bottom electrode via layer according to the top electrode and the sidewall spacers to form a bottom electrode and a bottom electrode via; and

forming a top electrode via onto an upper surface of the top electrode, wherein the top electrode via is bisected by a first line that is laterally separated from a second line bisecting the conductive metal region.

18. The method of claim 17 , further comprising:

forming an insulating anti-reflective layer within a recess within the top electrode at a location laterally offset from the top electrode via.

19. The method of claim 17 , further comprising:

forming a dielectric protection layer over an inter-level dielectric layer laterally surrounding the conductive metal region, wherein the bottom electrode via extends into an opening extending through dielectric protection layer at a location arranged over the conductive metal region.

20. The method of claim 19 , wherein the bottom electrode comprises a recess extending into the opening arranged over the bottom electrode via.