IP Library Granted Patent US 9,425,692
Granted Patent B2
US 9,425,692 · App. 14/372,765 · Granted Aug 23, 2016

DC to DC converter and method to transition the DC to DC converter from a buck mode to a boost mode

Inventors: Valerie Bernon-Enjalbert (Fonsorbes, FR); Franck Galtie (Plaisance du Touch, FR); Philippe Goyhenetche (Fonsorbes, FR)
Assignee: Freescale Semiconductor, Inc.
H02M3/1582H02M2001/0022
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Quick Facts
Patent No.
US 9,425,692
App. No.
14/372,765
Filed
Jul 17, 2014
Granted
Aug 23, 2016
Kind
B2
Art Unit
2838
USPC
323/271
Abstract

A DC to DC converter including a buck converter, a boost converter, and a control unit, wherein the control unit is arranged to calculate an error voltage of the buck converter Verr_buck based on a feedback output voltage Vout_FB of the DC to DC converter and a reference voltage of the buck converter Vref_buck, and wherein the control unit is arranged to calculate an error voltage of the boost converter Verr_boost based on the feedback output voltage Vout_FB of the DC to DC converter and a reference voltage of the boost converter Vref_boost, wherein the reference voltage of the boost converter Vref_boost is shifted by an offset Voffset as compared to the reference voltage of the buck converter Vref_buck.

Claims (46)

1. A DC to DC converter comprising

a buck converter;

a boost converter; and

a control unit,

wherein the control unit is configured to calculate an error voltage of the buck converter Verr_buck based on a feedback output voltage Vout_FB of the DC to DC converter and a reference voltage of the buck converter Vref_buck, and

wherein the control unit is configured to calculate an error voltage of the boost converter Verr_boost based on the feedback output voltage Vout_FB of the DC to DC converter and a reference voltage of the boost converter Vref_boost, wherein the reference voltage of the boost converter Vref_boost is shifted by an offset Voffset as compared to the reference voltage of the buck converter Vref_buck, and

wherein the control unit is configured to calculate a control signal to engage and disengage the boost converter based on the error voltage of the buck converter Verr_buck, and

wherein the control unit is configured to engage the boost converter when the error voltage of the buck converter Verr_buck is higher than a threshold voltage Vout_of_range, and to disengage the boost converter when the error voltage of the buck converter Verr_buck is lower than the threshold voltage Vout_of_range.

2. The DC to DC converter as claimed in claim 1 ,

wherein the control unit is configured to provide a time-dependent sensing voltage V sens based on an input voltage V in of the DC to DC converter and a pulsating voltage V puls , and

wherein the control unit is further configured to provide a first PWM signal by comparing the time-dependent sensing voltage V sens with the error voltage of the buck converter V err _ buck and to provide a second PWM signal by comparing the time-dependent sensing voltage V sens with the error voltage of the boost converter V err _ boost .

3. The DC to DC converter as claimed in claim 2 , wherein the control unit is configured to provide the first PWM signal and a clock signal as input signals for a HS control circuit that triggers a HS driver circuit for controlling a HS switching element of the buck converter.

4. The DC to DC converter as claimed in claim 2 , wherein the control unit is configured to provide the second PWM signal, a clock signal and the control signal as input signals for a LS control circuit that triggers a LS driver circuit for controlling a LS switching element of the boost converter.

5. A system on a die comprising a DC to DC converter as claimed claim 1 .

6. The DC to DC converter as claimed in claim 1 , wherein the control unit is configured to increase a duty cycle of the buck converter in response to an increase in the error voltage of the buck converter V err _ buck .

7. A method to operate a DC to DC converter including a buck converter, a boost converter, and a control unit, the method comprising:

providing, by the control unit, an error voltage of the buck converter Verr_buck based on a feedback output voltage Vout_FB of the DC to DC converter and a reference voltage of the buck converter Vref_buck;

providing, by the control unit, an error voltage of the boost converter Verr_boost based on the feedback output voltage Vout_FB of the DC to DC converter and a reference voltage of the boost converter Vref_boost, wherein the reference voltage of the boost converter Vref_boost is shifted by an offset Voffset as compared to the reference voltage of the buck converter Vref_buck;

calculating a control signal to engage and disengage the boost converter based on the error voltage of the buck converter Verr_buck;

engaging, by the control unit, the boost converter when the error voltage of the buck converter Verr_buck is higher than a threshold voltage Vout_of_range; and

disengaging, by the control unit, the boost converter when the error voltage of the buck converter Verr_buck is lower than the threshold voltage Vout_of_range.

8. The method as claimed in claim 7 , further comprising:

providing, by the control unit, a time-dependent sensing voltage V sens based on an input voltage V in of the DC to DC converter and a pulsating voltage V puls ;

providing, by the control unit, a first PWM signal by comparing the time-dependent sensing voltage V sens with the error voltage of the buck converter V err _ buck ; and

providing, by the control unit, a second PWM signal by comparing the time-dependent sensing voltage V sens with the error voltage of the boost converter V err _ boost .

9. The method as claimed in claim 8 , further comprising: providing the first PWM signal and a clock signal as input signals for a HS control circuit that triggers a HS driver circuit for controlling a HS switching element of the buck converter.

10. The method as claimed in claim 8 , further comprising: providing the second PWM signal, a clock signal and the control signal as input signals for a LS control circuit that triggers a LS driver circuit for controlling a LS switching element of the boost converter.

11. The method as claimed in claim 7 , further comprising:

increasing a duty cycle of the buck converter in response to an increase in the error voltage of the buck converter V err _ buck .

12. The method as claimed in claim 11 , further comprising:

increasing a duty cycle of the buck converter in response to an increase in the error voltage of the buck converter V err _ buck .

13. A method to operate a DC to DC converter including a buck converter, a boost converter, and a control unit, the method comprising:

providing, by the control unit, an error voltage of the buck converter V err _ buck based on a feedback output voltage V out _ FB of the DC to DC converter and a reference voltage of the buck converter V ref _ buck ;

providing, by the control unit, an error voltage of the boost converter V err _ boost based on the feedback output voltage V out _ FB of the DC to DC converter and a reference voltage of the boost converter V ref _ boost , wherein the reference voltage of the boost converter V ref _ boost is shifted by an offset V offset as compared to the reference voltage of the buck converter V ref _ buck ;

engaging, by the control unit, the boost converter when the error voltage of the buck converter V err _ buck is higher than a threshold voltage V out _ of _ range ; and

disengaging, by the control unit, the boost converter when the error voltage of the buck converter V err _ buck is lower than the threshold voltage V out _ of _ range .

14. The method as claimed in claim 13 , further comprising:

providing, by the control unit, a time-dependent sensing voltage V sens based on an input voltage V in of the DC to DC converter and a pulsating voltage V puls ;

providing, by the control unit, a first pulse width modulated (PWM) signal by comparing the time-dependent sensing voltage V sens with the error voltage of the buck converter V err _ buck ; and

providing, by the control unit, a second PWM signal by comparing the time-dependent sensing voltage V sens with the error voltage of the boost converter V err _ boost .

15. The method as claimed in claim 14 , further comprising:

providing the first PWM signal and a clock signal as input signals for a high side (HS) control circuit that triggers a HS driver circuit for controlling a HS switching element of the buck converter.

16. The method as claimed in claim 15 , wherein the duty cycle of the buck converter is 100 percent before the error voltage of the buck converter V err _ buck is higher than the threshold voltage V out _ of _ range , in response to a value of the threshold voltage V out _ of _ range .

17. The method as claimed in claim 15 , wherein the duty cycle of the boost converter is above 0 percent when the boost converter is engaged in response to a value of the error voltage of the boost converter V err _ boost .

18. The method as claimed in claim 14 , further comprising:

providing the second PWM signal, a clock signal and the control signal as input signals for a low side (LS) control circuit that triggers a LS driver circuit for controlling a LS switching element of the boost converter.

Assignments (24)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0241. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 5, 2017
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 041260/0850 →
MERGER Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040652/0241 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 7, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037458/0460 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 7, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037458/0502 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0921 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Nov 4, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 034153/0027 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Nov 4, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 034160/0351 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Nov 4, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 034160/0370 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 17, 2014
From: BERNON-ENJALBERT, VALERIE; GALTIE, FRANCK; GOYHENETCHE, PHILIPPE
To: FREESCALE SEMICONDUCTOR INC.
Reel/Frame 033330/0358 →
Continuity (1)
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