Method for making a semiconductor device with sidewall spacers for confining epitaxial growth

1. A method for making a semiconductor device comprising:

forming, above a substrate, a plurality of laterally spaced-apart semiconductor fins;

forming at least one dielectric layer directly contacting the substrate and adjacent an end portion of the plurality of semiconductor fins and within the space between adjacent semiconductor fins;

forming a pair of sidewall spacers adjacent outermost semiconductor fins at the end portion of the plurality of semiconductor fins;

removing the at least one dielectric layer and end portion of the plurality of semiconductor fins between the pair of sidewall spacers; and

forming source/drain regions between the pair of sidewall spacers.

2. The method according to claim 1 forming source/drain regions comprises epitaxially growing the source/drain regions.

3. The method according to claim 2 wherein the source/drain regions comprise silicon.

4. The method according to claim 2 wherein the source/drain regions comprise silicon germanium.

5. The method according to claim 1 wherein forming the at least one dielectric layer comprises:

forming a first dielectric layer comprising a first dielectric material on the end portion of the plurality of semiconductor fins; and

forming a second dielectric layer comprising a second dielectric material different than the first dielectric material on the first dielectric layer and with the second dielectric material filling the space between adjacent semiconductor fins.

6. The method according to claim 5 further comprising, before forming the sidewall spacers, removing portions of the second dielectric layer laterally adjacent the outermost semiconductor fins and above the semiconductor fins while retaining portions of the second dielectric layer filling the space between adjacent semiconductor fins.

7. The method according to claim 5 wherein forming the second dielectric layer comprises atomic layer deposition thereof.

8. The method according to claim 1 further comprising forming a gate overlying the plurality of semiconductor fins.

9. The method according to claim 1 wherein the semiconductor fins comprise silicon.

10. The method according to claim 1 wherein the substrate comprises a semiconductor substrate.

11. A method for making a semiconductor device comprising:

forming, above a substrate, a plurality of laterally spaced-apart semiconductor fins;

forming a first dielectric layer comprising a first dielectric material directly contacting the substrate and adjacent an end portion of the plurality of semiconductor fins;

forming a second dielectric layer comprising a second dielectric material different than the first dielectric material on the first dielectric layer and with the second dielectric material filling the space between adjacent semiconductor fins;

forming a pair of sidewall spacers adjacent outermost semiconductor fins at the end portion of the plurality of semiconductor fins;

removing at least portions of the second dielectric layer and the end portion of the plurality of semiconductor fins between the pair of sidewall spacers; and

epitaxially forming source/drain regions between the pair of sidewall spacers.

12. The method according to claim 11 further comprising, before forming the sidewall spacers, removing portions of the second dielectric layer laterally adjacent the outermost semiconductor fins and above the semiconductor fins while retaining portions of the second dielectric layer filling the space between adjacent semiconductor fins.

13. The method according to claim 11 wherein forming the second dielectric layer comprises atomic layer deposition thereof.

14. The method according to claim 11 further comprising forming a gate overlying the plurality of semiconductor fins.

15. The method according to claim 11 wherein the semiconductor fins and the substrate each comprises silicon.

16. A method for making a semiconductor device comprising:

forming at least one dielectric layer adjacent an end portion of a plurality of spaced apart silicon fins and within the space between adjacent silicon fins, the plurality of semiconductor fins being formed above a substrate and with the at least one dielectric layer directly contacting the substrate;

forming a pair of sidewall spacers adjacent outermost silicon fins at the end portion of the plurality of silicon fins;

removing the at least one dielectric layer and end portion of the plurality of silicon fins between the pair of sidewall spacers; and

forming source/drain regions between the pair of sidewall spacers.

17. The method according to claim 16 forming source/drain regions comprises epitaxially growing the source/drain regions.

18. The method according to claim 16 wherein forming the at least one dielectric layer comprises:

forming a first dielectric layer comprising a first dielectric material on the end portion of the plurality of silicon fins; and

forming a second dielectric layer comprising a second dielectric material different than the first dielectric material on the first dielectric layer and with the second dielectric material filling the space between adjacent silicon fins.

19. The method according to claim 18 further comprising, before forming the sidewall spacers, removing portions of the second dielectric layer laterally adjacent the outermost silicon fins and above the silicon fins while retaining portions of the second dielectric layer filling the space between adjacent silicon fins.

20. The method according to claim 18 wherein forming the second dielectric layer comprises atomic layer deposition thereof.

21. The method according to claim 16 further comprising forming a gate overlying the plurality of semiconductor fins.