IP Library › Granted Patent US 9,484,378
Granted Patent B2
US 9,484,378 · App. 14/207,972 · Granted Nov 1, 2016

Semiconductor devices including back-side integrated circuitry

Inventors: Kyle K. Kirby (Boise, ID); Steve Oliver (San Jose, CA)
Assignee: Micron Technology, Inc.
H01L27/14636H01L27/14625H01L27/14632
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,484,378
App. No.
14/207,972
Granted
Nov 1, 2016
Kind
B2
Abstract

Semiconductor devices may include a semiconductor substrate comprising at least one of transistors and capacitors may be located at an active surface of the semiconductor substrate. An imperforate dielectric material may be located on the active surface, the imperforate dielectric material covering the at least one of transistors and the capacitors. Electrically conductive material in contact openings may be electrically connected to the at least one of transistors and capacitors and extend to a back side surface of the semiconductor substrate. Laterally extending conductive elements may extend over the back side surface of the semiconductor substrate and may be electrically connected to the conductive material in the contact openings. At least one laterally extending conductive element may be electrically connected to a first transistor or capacitor and may extend laterally underneath a second, different transistor or capacitor to which the laterally extending conductive element is not electrically connected.

Claims (33)

1. A semiconductor device, comprising:

a semiconductor substrate comprising an active surface and an opposing back side surface;

at least one of transistors and capacitors at the active surface of the semiconductor substrate;

an imperforate dielectric material on the active surface of the semiconductor substrate, the imperforate dielectric material covering and in contact with the at least one of transistors and capacitors;

contact openings extending through the semiconductor substrate from the back side surface toward the active surface of the semiconductor substrate;

electrically conductive material in the contact openings, the electrically conductive material being electrically connected to the at least one of transistors and capacitors and extending to the back side surface of the semiconductor substrate; and

laterally extending conductive elements extending over the back side surface of the semiconductor substrate and electrically connected to the conductive material in the contact openings, wherein a plurality of longitudinally spaced, laterally extending conductive elements electrically connected to a transistor or capacitor extend laterally underneath other, different transistors or capacitors to which the plurality of longitudinally spaced, laterally extending conductive elements are not electrically connected, each longitudinally spaced, laterally extending conductive element of the plurality at least partially embedded within a distinct mass of dielectric material located on a side of the back side surface of the semiconductor substrate opposite the active surface, each distinct region of dielectric material comprising a boundary in contact with an adjacent region of dielectric material.

2. The semiconductor device of claim 1 , wherein a thickness of the imperforate dielectric material is about a half a micron or less.

3. The semiconductor device of claim 1 , wherein a surface of the imperforate dielectric material on a side of the imperforate dielectric material opposite the semiconductor substrate is at least substantially planar.

4. The semiconductor device of claim 1 , wherein the at least one of transistors and capacitors comprises at least one transistor and wherein at least one of the contact openings extends to a source, drain, or gate of the at least one transistor.

5. The semiconductor device of claim 1 , wherein the at least one of transistors and capacitors comprises a capacitor and wherein at least one of the contact openings extends to an electrode of the capacitor.

6. The semiconductor device of claim 1 , wherein the laterally extending conductive elements are not confined to a periphery of the semiconductor substrate.

7. The semiconductor device of claim 1 , wherein no laterally extending conductive elements extend over the active surface.

8. The semiconductor device of claim 1 , further comprising a dielectric liner material located between the electrically conductive material in at least one contact opening and a sidewall of the at least one contact opening.

9. The semiconductor device of claim 1 , wherein the semiconductor substrate comprises an array of image sensing elements comprising an array of photodiodes in the active surface of the semiconductor substrate and at least one laterally extending conductive element extends laterally underneath the array of photodiodes.

10. A semiconductor device, comprising:

a semiconductor substrate comprising an active surface and an opposing back side surface;

transistors at the active surface of the semiconductor substrate;

at least one capacitor laterally adjacent at least one of the transistors at the active surface of the semiconductor substrate;

an imperforate dielectric material on the active surface of the semiconductor substrate, the imperforate dielectric material covering and in contact with the transistors and the at least one capacitor;

contact openings extending through the semiconductor substrate from the back side surface toward the active surface of the semiconductor substrate;

electrically conductive material in the contact openings, the electrically conductive material in each of the contact openings being electrically connected to one of the transistors or the at least one capacitor; and

laterally extending conductive elements extending over the back side surface of the semiconductor substrate and electrically connected to the conductive material in the contact openings, wherein a plurality of longitudinally spaced, laterally extending conductive elements electrically connected to a transistor extend laterally underneath other, different transistors to which the plurality of longitudinally spaced, laterally extending conductive elements are not electrically connected, each longitudinally spaced, laterally extending conductive element of the plurality at least partially embedded within a distinct mass of dielectric material located on a side of the back side surface of the semiconductor substrate opposite the active surface, each distinct region of dielectric material comprising a boundary in contact with an adjacent region of dielectric material.

11. The semiconductor device of claim 10 , wherein the semiconductor substrate comprises an array of image sensing elements comprising an array of photodiodes in the active surface of the semiconductor substrate.

12. The semiconductor device of claim 11 , wherein at least one of the transistors comprises at least one of a transfer gate, a reset gate, a source follower gate, and a row select gate operatively connected to at least one photodiode of the array.

13. The semiconductor device of claim 11 , wherein at least one laterally extending conductive element extends laterally underneath the array of photodiodes.

14. The semiconductor device of claim 10 , wherein a thickness of the imperforate dielectric material is about a half a micron or less.

15. The semiconductor device of claim 10 , wherein a surface of the imperforate dielectric material on a side of the imperforate dielectric material opposite the semiconductor substrate is at least substantially planar.

16. The semiconductor device of claim 10 , further comprising a carrier substrate secured to the dielectric material on a side of the imperforate dielectric material opposing the semiconductor substrate.

17. The semiconductor device of claim 10 , wherein at least one of the contact openings extends to a source, drain, or gate of at least one of the transistors.

18. The semiconductor device of claim 10 , wherein at least one of the contact openings extends to an electrode of the at least one capacitor.

19. The semiconductor device of claim 10 , wherein the laterally extending conductive elements are not confined to a periphery of the semiconductor substrate.

20. The semiconductor device of claim 10 , wherein no laterally extending conductive elements extend over the active surface.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
Continuity (3)
Continuation 13198533 · Aug 4, 2011
Division 11761904 · Jun 12, 2007
Related Publication 20140191303A1 · Jul 10, 2014