IP Library › Granted Patent US 9,507,704
Granted Patent B2
US 9,507,704 · App. 14/448,728 · Granted Nov 29, 2016

Storage module and method for determining ready/busy status of a plurality of memory dies

Inventors: Daniel E. Tuers (Kapaa, HI); Abjiheet Manohar (Bangalore, IN); Yoav Weinberg (Thornhill, CA)
Assignee: SanDisk Technologies LLC
G06F12/0238G06F13/4243Y02B60/1228Y02B60/1235
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Quick Facts
Patent No.
US 9,507,704
App. No.
14/448,728
Granted
Nov 29, 2016
Kind
B2
Abstract

A storage module and method are provided for determining ready/busy status of a plurality of memory dies. In one embodiment, a bus has a ready/busy line that is shared among the plurality of memory dies, and a time-division multiplex signal on the shared ready/busy line is used to communicate the ready/busy status of each of the memory dies. In another embodiment, each of the memory dies sends its ready/busy status to the storage controller using a different one of a plurality of data lines in the bus. In yet another embodiment, each of the memory dies sends a pulse across the ready/busy line with a different pulse width. To avoid collisions, each memory die waits a different number of clock cycles before attempting to send its pulse status after determining that the shared ready/busy line is in use.

Claims (33)

1. A storage module comprising:

a storage controller;

a bus; and

a plurality of memory dies in communication with the storage controller via the bus, wherein the bus has a ready/busy line that is shared among the plurality of memory dies, and wherein the plurality of memory dies are configured to provide a time-division multiplex signal on the shared ready/busy line to communicate the ready/busy status of each of the memory dies to the storage controller.

2. The storage module of claim 1 , wherein one of the memory dies is configured to broadcast a synchronization packet to the other memory dies and to the storage controller.

3. The storage module of claim 2 , wherein the storage controller is configured to provide the plurality of memory dies with a clock signal, and wherein each of the memory dies is configured to provide a ready/busy pulse at a different number of clock cycles after receiving the synchronization packet.

4. The storage module of claim 3 , wherein the clock signal is a DQS data strobe signal.

5. The storage module of claim 1 , wherein the storage controller comprises a scheduler that schedules when commands are to be sent to each of the memory dies based on each of the memory die's ready/busy status.

6. The storage module of claim 1 , wherein at least one of the memory dies comprises a three-dimensional memory.

7. The storage module of claim 1 , wherein the storage module is embedded in a host.

8. The storage module of claim 1 , wherein the storage module is removably connected to a host.

9. The storage module of claim 1 , wherein the storage module is a solid-state drive.

10. A storage module comprising:

a plurality of memory dies;

a bus having a plurality of data lines; and

a storage controller in communication with the plurality of memory dies via the bus, wherein the storage controller is configured to place the storage module in either a first mode of operation or in a second mode of operation;

wherein, in the first mode of operation, the plurality of data lines are used to transfer data between one of the memory dies and the storage controller; and

wherein, in the second mode of operation, the plurality of data lines are used to communicate ready/busy status information of the plurality of memory dies to the storage controller, wherein each of the memory dies sends its ready/busy status to the storage controller using a different one of the plurality of data lines.

11. The storage module of claim 10 , wherein the storage controller is configured to switch from the second mode to the first mode when the storage controller wants to send a command to one of the memory dies.

12. The storage module of claim 10 , wherein the storage controller comprises a scheduler that schedules when commands are to be sent to each of the memory dies based on each of the memory die's ready/busy status.

13. The storage module of claim 10 , wherein at least one of the memory dies comprises a three-dimensional memory.

14. The storage module of claim 10 , wherein the storage module is embedded in a host.

15. The storage module of claim 10 , wherein the storage module is removably connected to a host.

16. The storage module of claim 10 , wherein the storage module is a solid-state drive.

17. A storage module comprising:

a storage controller;

a bus; and

a plurality of memory dies in communication with the storage controller via the bus, wherein the bus has a ready/busy line that is shared among the plurality of memory dies, and wherein each of the plurality of memory dies is configured to indicate its ready/busy status by sending a pulse across the ready/busy line with pulse width that is different from those used by the other memory dies, and, to avoid collisions, each of the plurality of memory dies is further configured to wait a different number of clock cycles before attempting to send its pulse status after determining that the shared ready/busy line is in use.

18. The storage module of claim 17 , wherein the storage controller comprises a scheduler that schedules when commands are to be sent to each of the memory dies based on each of the memory die's ready/busy status.

19. The storage module of claim 17 , wherein at least one of the memory dies comprises a three-dimensional memory.

20. The storage module of claim 17 , wherein the storage module is embedded in a host.

21. The storage module of claim 17 , wherein the storage module is removably connected to a host.

22. The storage module of claim 17 , wherein the storage module is a solid-state drive.

Assignments (2)
CHANGE OF NAME Recorded May 25, 2016
From: SANDISK TECHNOLOGIES INC
To: SANDISK TECHNOLOGIES LLC
Reel/Frame 038807/0807 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 12, 2014
From: TUERS, DANIEL E.; MANOHAR, ABHIJEET; WEINBERG, YOAV
To: SANDISK TECHNOLOGIES INC.
Reel/Frame 033517/0910 →
Priority Claims (1)
IN 2893/CHE/2014 · Jun 13, 2014 · national
Continuity (1)
Related Publication 20150363342A1 · Dec 17, 2015