Methods and apparatuses to form self-aligned caps
At least one conductive line in a dielectric layer over a substrate is recessed to form a channel. The channel is self-aligned to the conductive line. The channel can be formed by etching the conductive line to a predetermined depth using a chemistry comprising an inhibitor to provide uniformity of etching independent of a crystallographic orientation. A capping layer to prevent electromigration is deposited on the recessed conductive line in the channel. The channel is configured to contain the capping layer within the width of the conductive line.
1. An apparatus, comprising:
a substrate comprising silicon;
an interlayer dielectric layer over the substrate, the interlayer dielectric layer comprising silicon, oxygen, and carbon, the interlayer dielectric layer having a top boundary;
a trench in the interlayer dielectric layer, the trench having internal sidewalls;
a barrier layer comprising tantalum and nitrogen on the internal sidewalls of the trench;
a conductive material in the trench, the barrier layer between the conductive material and the interlayer dielectric layer; and
a capping region comprising cobalt directly on the top of the conductive material comprising copper and cobalt, a top of the capping region near the interlayer dielectric layer being no higher than the top boundary of the interlayer dielectric layer that is near the capping region.
2. The apparatus of claim 1 , wherein the dielectric layer comprises a low-k material.
3. The apparatus of claim 1 , wherein the substrate comprises silicon.
4. The apparatus of claim 1 , wherein the barrier layer comprises tantalum and nitrogen.
5. The apparatus of claim 1 , wherein the capping region comprises cobalt.
6. The apparatus of claim 5 , wherein the dielectric material comprises silicon, carbon, and oxygen, and the barrier layer comprises tantalum and nitrogen.
7. An apparatus, comprising:
a substrate comprising a semiconductor material;
a dielectric layer over the substrate, the dielectric layer having a top boundary;
a plurality of trenches in the dielectric layer, the plurality of trenches having sidewalls;
a barrier layer on the sidewalls of at least some of the plurality of trenches;
conductive material in the at least some of the plurality of trenches, the barrier layer being between the conductive material and the sidewalls, the conductive material being no higher than the top boundary of the dielectric layer at a location near to the conductive material; and
a capping region comprising cobalt directly on the conductive material comprising copper and cobalt, the capping region being no higher than the top boundary of the dielectric layer that is near to the capping region.
8. The apparatus of claim 7 , wherein the dielectric layer comprises a silicon, oxygen, and carbon.
9. The apparatus of claim 8 , wherein the dielectric layer comprises carbon doped silicon oxide.