IP Library › Granted Patent US 9,673,151
Granted Patent B2
US 9,673,151 · App. 14/837,604 · Granted Jun 6, 2017

Semiconductor package having metal layer

Inventors: Chih-Hsien Chiu (Taichung, TW); Hao-Ju Fang (Taichung, TW); Hsin-Lung Chung (Taichung, TW); Cho-Hsin Chang (Taichung, TW); Tsung-Hsien Tsai (Taichung, TW); Chia-Yang Chen (Taichung, TW); Chun-Chi Ke (Taichung, TW)
Assignee: Siliconware Precision Industries Co., Ltd.
H01L23/552H01L21/4853H01L21/54H01L21/561H01L21/563H01L21/78H01L23/16H01L23/3114H01L23/3128H01L25/0655H01L23/49811H01L23/49838H01L2224/48091H01L2224/48227H01L2924/15311H01L2924/181H01L2924/1815
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Quick Facts
Patent No.
US 9,673,151
App. No.
14/837,604
Granted
Jun 6, 2017
Kind
B2
Abstract

A semiconductor package is provided, including: a substrate having opposing first and second surfaces; a plurality of semiconductor components disposed on and electrically connected to the first surface; an encapsulant encapsulating the first surface and the semiconductor components and having at least one first groove that partitions the substrate into a plurality of package units, each of which has at least one of the semiconductor components; and a metal layer formed on the substrate and the encapsulant and encapsulating a periphery of the package units, with the second surface exposed from the metal layer, wherein the metal layer is formed along a wall surface of the first groove, to form a second groove corresponding in position to the first groove and having a metal surface. Therefore, the package units are isolated and form a multilayer isolated structure, including metal layers and air layers, and are electromagnetically shielded from one another.

Claims (15)

1. A semiconductor package, comprising:

a substrate having opposing first and second surfaces;

a plurality of semiconductor components disposed on and electrically connected to the first surface of the substrate;

an encapsulant encapsulating the first surface of the substrate and the semiconductor components and having at least one first groove that partitions the substrate into a plurality of package units, wherein each of the package units has at least one of the semiconductor components;

a metal layer formed on the substrate and the encapsulant and encapsulating a periphery of the package units, with the second surface of the substrate exposed from the metal layer, wherein the metal layer is formed on a groove surface of the first groove, to form a second groove corresponding in position to the first groove and having a metal surface; and

a filling material for filling the second groove, wherein the filling material is an insulating material or a conductive material having a conductivity lower than that of the metal layer.

2. The semiconductor package of claim 1 , wherein the semiconductor package is a radio-frequency (RF) module.

3. The semiconductor package of claim 1 , wherein the semiconductor components are RF chips.

4. The semiconductor package of claim 3 , wherein the RF chips are Bluetooth chips or Wi-Fi chips.

5. The semiconductor package of claim 1 , wherein the encapsulant has an exposed top surface, an exposed side surface, and a bottom surface coupled to the first surface of the substrate, and the at least one first groove penetrates the encapsulant to communicate the exposed top surface of the encapsulant with the first surface of the substrate.

6. The semiconductor package of claim 5 , wherein the metal layer is formed on the exposed top surface and the exposed side surface of the encapsulant.

7. The semiconductor package of claim 1 , wherein the metal layer is made of a material selected from the group consisting of copper, nickel, iron, aluminum and stainless steel.

8. The semiconductor package of claim 1 , wherein, when the encapsulant has a plurality of the first grooves, the first grooves are arranged in a line.

9. The semiconductor package of claim 1 , wherein the substrate has a grounding structure electrically connected with the metal layer.

10. The semiconductor package of claim 9 , wherein the grounding structure is a grounding part which corresponds in position to the first groove and is electrically connected to the metal layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 27, 2015
From: CHIU, CHIH-HSIEN; FANG, HAO-JU, MR.; CHUNG, HSIN-LUNG; CHANG, CHO-HSIN, MR.; TSAI, TSUNG-HSIEN; CHEN, CHIA-YANG; KE, CHUN-CHI
To: SILICONWARE PRECISION INDUSTRIES CO., LTD.
Reel/Frame 036440/0324 →
Priority Claims (1)
TW 103133886 A · Sep 30, 2014 · national
Continuity (1)
Related Publication 20160093576A1 · Mar 31, 2016