Extremely thin package
Techniques for achieving extremely thin package structures are disclosed. In some embodiments, a device comprises an integrated circuit connected to a leadframe or substrate via connections and EMC (Epoxy Molding Compound) surrounding the integrated circuit except at a backside of the integrated circuit and connecting areas via which the integrated circuit is connected to the leadframe or substrate.
1. A device, comprising:
an integrated circuit connected to a leadframe or substrate via connections; and
EMC (Epoxy Molding Compound) surrounding the integrated circuit except at a backside of the integrated circuit and connecting areas via which the integrated circuit is connected to the leadframe or substrate;
wherein the backside of the integrated circuit is left exposed and wherein during device assembly grinding is used to remove EMC from the device.
2. The device of claim 1 , wherein during device assembly EMC between the backside of the integrated circuit and top-side of the device is removed.
3. The device of claim 1 , wherein the exposed backside of the integrated circuit is polished.
4. The device of claim 1 , wherein grinding comprises grinding until the backside of the integrated circuit is exposed.
5. The device of claim 1 , wherein grinding comprises grinding until a desired package thickness is achieved.
6. The device of claim 1 , wherein grinding comprises grinding until a desired integrated circuit thickness is achieved.
7. The device of claim 1 , wherein grinding comprises grinding at least a portion of the backside of the integrated circuit.
8. The device of claim 1 , wherein the backside of the integrated circuit comprises exposed silicon.
9. A device, comprising:
an integrated circuit connected to a leadframe or substrate via connections; and
EMC (Epoxy Molding Compound) surrounding the integrated circuit except at a backside of the integrated circuit and connecting areas via which the integrated circuit is connected to the leadframe or substrate;
wherein the backside of the integrated circuit is left exposed and wherein the device comprises an extremely thin DFN (dual flat no-lead) or QFN (quad flat no-lead) package.
10. The device of claim 1 , wherein the device comprises an exposed silicon extremely thin DFN (dual flat no-lead) or QFN (quad flat no-lead) package.
11. A method, comprising:
molding a device comprising an integrated circuit connected to a leadframe or substrate with EMC (Epoxy Molding Compound);
grinding EMC to expose the integrated circuit backside; and
applying an adhesion film to a top-side of the device to protect the backside of the integrated circuit that is exposed.
12. The method of claim 11 , wherein grinding comprises removing EMC between the backside of the integrated circuit and top-side of the device.
13. The method of claim 11 , wherein grinding comprises grinding the device top-side until the integrated circuit backside is exposed.
14. The method of claim 11 , wherein grinding comprises grinding until the backside of the integrated circuit is exposed.
15. The method of claim 11 , wherein grinding comprises grinding until a desired package thickness is achieved.
16. The method of claim 11 , wherein grinding comprises grinding until a desired integrated circuit thickness is achieved.
17. The method of claim 11 , wherein grinding comprises grinding at least a portion of the backside of the integrated circuit.
18. The method of claim 11 , wherein the backside of the integrated circuit comprises exposed silicon.
19. The method of claim 11 , wherein the device comprises an extremely thin DFN (dual flat no-lead) or QFN (quad flat no-lead) package.
20. A device, comprising:
an integrated circuit connected to a leadframe or substrate via connections; and
EMC (Epoxy Molding Compound) surrounding the integrated circuit except at a backside of the integrated circuit and connecting areas via which the integrated circuit is connected to the leadframe or substrate;
wherein the backside of the integrated circuit is left exposed and wherein the device comprises a light emission device.
21. The device of claim 20 , wherein the device comprises an extremely thin DFN (dual flat no-lead) or QFN (quad flat no-lead) package.