IP Library Granted Patent US 9,748,081
Granted Patent B2
US 9,748,081 · App. 14/862,015 · Granted Aug 29, 2017

Method of manufacturing semiconductor device and sputtering apparatus

Inventors: Takashi Hamaya (Tokyo, JP); Hideaki Tsugane (Tokyo, JP); Hidenori Suzuki (Tokyo, JP)
Assignee: RENESAS ELECTRONICS CORPORATION
H01J37/3447H01J37/3405H01L29/49H01L21/823814
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,748,081
App. No.
14/862,015
Granted
Aug 29, 2017
Kind
B2
Abstract

Reliability of a semiconductor device is improved, and use efficiency of a sputtering apparatus is increased. When depositing thin films over a main surface of a semiconductor wafer using a magnetron sputtering apparatus in which a collimator is installed in a space between the semiconductor wafer and a target installed in a chamber, a region inner than a peripheral part of the collimator is made thinner than the peripheral part. Thus, it becomes possible to suppress deterioration in uniformity of the thin film in a wafer plane, which may occur as the integrated usage of the target increases.

Claims (44)

1. A method of manufacturing a semiconductor device comprising a step of:

depositing a thin film containing components for configuring a target over a main surface of a semiconductor wafer with use of a sputtering apparatus which includes: a chamber; a wafer stage installed in the chamber and supporting the semiconductor wafer; the target so installed as to oppose the semiconductor wafer supported by the wafer stage; and a collimator installed in a space between the semiconductor wafer supported by the wafer stage and the target and having a plurality of through holes provided along its thickness direction,

wherein a region inner than a peripheral part of the collimator is thinner than the peripheral part and has flat top and bottom surfaces,

depths of the through holes provided in the collimator are identical with one another and diameters of the through holes continuously increase in size from a peripheral part to a central part of the collimator, and

a distance between adjacent through holes continuously decreases in size from the peripheral part to the central part of the collimator.

2. The method of manufacturing a semiconductor device according to claim 1 ,

wherein screw holes for fastening the collimator to the chamber are provided in the peripheral part, and

wherein the through holes are provided in the region inner than the peripheral part.

3. The method of manufacturing a semiconductor device according to claim 1 ,

wherein the collimator has a first surface opposed to the semiconductor wafer and a second surface located on the side opposite to the first surface and opposed to the target,

wherein the region inner than the peripheral part of the first surface of the collimator is closer to the second surface than the peripheral part, and

wherein the peripheral part and the region inner than the peripheral part of the second surface of the collimator are in the same plane.

4. The method of manufacturing a semiconductor device according to claim 1 , wherein the sputtering apparatus is a magnetron sputtering apparatus in which a magnet is arranged close to the target.

5. The method of manufacturing a semiconductor device according to claim 1 , wherein the thin film is a conductive film for a silicide structure formed over the main surface of the semiconductor wafer.

6. The method of manufacturing a semiconductor device according to claim 5 , wherein the conductive film is a Co film or a Ni film.

7. The method of manufacturing a semiconductor device according to claim 1 , wherein the thin film is a conductive film for a wiring structure formed over the main surface of the semiconductor wafer.

8. The method of manufacturing a semiconductor device according to claim 7 , wherein the conductive film is a Cu film.

9. A method of manufacturing a semiconductor device comprising a step of:

depositing a thin film containing components for configuring a target over a main surface of a semiconductor wafer with use of a sputtering apparatus which includes: a chamber; a wafer stage installed in the chamber and supporting the semiconductor wafer; the target so installed as to oppose the semiconductor wafer supported by the wafer stage; and a collimator installed in a space between the semiconductor wafer supported by the wafer stage and the target and having a plurality of through holes provided along its thickness direction,

wherein depths of the through holes provided in the collimator are identical with one another and diameters of the through holes continuously increase in size from a peripheral part to a central part of the collimator, and

a distance between adjacent through holes continuously decreases in size from the peripheral part to the central part of the collimator.

10. A sputtering apparatus comprising:

a chamber;

a wafer stage installed in the chamber and supporting a semiconductor wafer; and

a collimator installed above the wafer stage and having a plurality of through holes provided along its thickness direction,

wherein a peripheral part of the collimator is thicker than a region inner than the peripheral part and has flat top and bottom surfaces,

diameters of the through holes continuously increase in size from the peripheral part to the central part of the collimator, and

a distance between adjacent through holes continuously decreases in size from the peripheral part to the central part of the collimator.

11. The sputtering apparatus according to claim 10 ,

wherein screw holes for fastening the collimator to the chamber are provided in the peripheral part of the collimator, and

wherein the through holes are provided in the region inner than the peripheral part.

12. The sputtering apparatus according to claim 10 ,

wherein the collimator has a first surface opposed to the wafer stage and a second surface located on the side opposite to the first surface,

wherein the first surface in the region inner than the peripheral part is closer to the second surface than the first surface in the peripheral part, and

wherein the peripheral part and the region inner than the peripheral part of the second surface are in the same plane.

13. A sputtering apparatus according to claim 10 , wherein a magnet is arranged above the collimator.

14. A sputtering apparatus comprising:

a chamber;

a wafer stage installed in the chamber and supporting a semiconductor wafer; and

a collimator installed above the wafer stage and having a plurality of through holes provided along its thickness direction,

wherein diameters of the through holes continuously increase in size from a peripheral part of the collimator to a central part of the collimator, and

a distance between adjacent through holes continuously decreases in size from the peripheral part to the central part of the collimator.

15. The method of manufacturing a semiconductor device according to claim 10 , wherein the thickness of the collimator continuously decreases from the peripheral part of the collimator to a central part thereof.

16. The sputtering apparatus according to claim 14 , wherein the thickness of the collimator continuously decreases from the peripheral part to the central part of the collimator.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 22, 2015
From: HAMAYA, TAKASHI; TSUGANE, HIDEAKI; SUZUKI, HIDENORI
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 036627/0152 →
Priority Claims (1)
JP 2014-192478 · Sep 22, 2014 · national
Continuity (1)
Related Publication 20160086779A1 · Mar 24, 2016