FinFET with dummy gate on non-recessed shallow trench isolation (STI)

1. A method of forming a fin field effect transistor (FinFET) device, the method comprising:

forming fins from a semiconductor substrate;

forming a non-recessed shallow trench isolation (STI) region between the fins;

forming a dummy gate on the non-recessed STI region; and

protecting the non-recessed STI region while recessed STI regions are formed, wherein the fins comprise a first fin, the first fin having a first longitudinal axis, the first longitudinal axis intersecting the non-recessed STI region and at least one of the recessed STI regions.

2. The method of claim 1 further comprising:

forming active gates over the fins simultaneously with forming the dummy gate on the non-recessed STI region.

3. The method of claim 2 , wherein a top surface of the dummy gate and top surfaces of the active gates are co-planar.

4. The method of claim 1 further comprising:

forming recessed STI regions on opposing sides of the fins as the non-recessed STI regions.

5. The method of claim 4 , further comprising:

maintaining the recessed STI regions free of any of the dummy gates.

6. The method of claim 1 , wherein protecting the non-recessed STI region comprises:

forming and patterning a photoresist on a top surface of the non-recessed STI region.

7. The method of claim 1 , wherein a top surface of the non-recessed STI region and a top surface of the fins are co-planar.

8. The method of claim 1 , wherein a longitudinal axis of the dummy gate is perpendicular to the first longitudinal axis of the first fin.

9. A method comprising:

forming a first fin and a second fin extending above a substrate, the first fin and the second fin having collinear longitudinal axes;

forming a dielectric material surrounding and between the first fin and the second fin;

protecting a first portion of the dielectric material between the first fin and the second fin with a protective layer;

recessing the unprotected portions of the dielectric material to form recessed shallow trench isolation (STI) regions, the first portion of the dielectric material forming a non-recessed STI region;

removing the protective layer from over the first portion of the dielectric material; and

forming gates over the first fin, the second fin, and the non-recessed STI region.

10. The method of claim 9 , wherein the gate over the non-recessed STI region is a dummy gate.

11. The method of claim 10 , wherein a longitudinal axis of the dummy gate is perpendicular to longitudinal axes of the first fin and the second fin.

12. The method of claim 10 , wherein the dummy gate is entirely disposed over the non-recessed STI region.

13. The method of claim 9 , wherein a top surface of the non-recessed STI region and top surfaces of the first fin and the second fin are co-planar.

14. The method of claim 9 , wherein longitudinal axes of the first fin and the second fin intersect the non-recessed STI region and the recessed STI regions.

15. The method of claim 9 , wherein protecting the first portion of the dielectric material comprises:

forming and patterning a photoresist on a top surface of the first portion of the dielectric material.

16. The method of claim 9 , wherein the recessed STI regions are free of any dummy gates.

17. A method comprising:

forming a first fin and a second fin extending above a substrate, the first fin having a first longitudinal axis;

forming shallow trench isolation (STI) regions surrounding and between the first fin and the second fin;

recessing first portions of the STI regions to form recessed STI regions while a second portion of the STI regions remains non-recessed, the second portion forming a non-recessed STI region, the first longitudinal axis intersecting the non-recessed STI region and at least one of the recessed STI regions;

forming active gates over the first fin and the second fin; and

forming a dummy gate over the non-recessed STI region.

18. The method of claim 17 , wherein recessing first portions of the STI regions to form recessed STI regions while a second portion of the STI regions remains non-recessed further comprises:

forming and patterning a photoresist on the second portion of the STI regions;

etching the exposed first portions of the STI regions to form the recessed STI regions; and

removing the photoresist from the second portion of the STI regions.

19. The method of claim 17 , wherein a top surface of the non-recessed STI region and top surfaces of the first fin and the second fin are co-planar.

20. The method of claim 17 , wherein the dummy gate is entirely disposed over the non-recessed STI region.