Display device
An object is to provide a display device that performs accurate display. A circuit is formed using a transistor that includes an oxide semiconductor and has a low off-state current. A precharge circuit or an inspection circuit is formed in addition to a pixel circuit. The off-state current is low because the oxide semiconductor is used. Thus, it is not likely that a signal or voltage is leaked in the precharge circuit or the inspection circuit to cause defective display. As a result, a display device that performs accurate display can be provided.
1. A liquid crystal display device comprising:
a pixel portion including a first pixel performing red display, a second pixel performing blue display, and a third pixel performing green display; and
a circuit configured to inspect the pixel portion, the circuit including a fourth transistor, a fifth transistor, and a sixth transistor,
wherein the first pixel includes a first transistor and a first liquid crystal element,
wherein the second pixel includes a second transistor and a second liquid crystal element,
wherein the third pixel includes a third transistor and a third liquid crystal element,
wherein one of source and drain of the first transistor is electrically connected to a first signal line and the other of source and drain of the first transistor is electrically connected to the first liquid crystal element,
wherein one of source and drain of the second transistor is electrically connected to a second signal line and the other of source and drain of the second transistor is electrically connected to the second liquid crystal element,
wherein one of source and drain of the third transistor is electrically connected to a third signal line and the other of source and drain of the third transistor is electrically connected to the third liquid crystal element,
wherein gates of the fourth transistor, the fifth transistor, and the sixth transistor are electrically connected to each other,
wherein one of source and drain of the fourth transistor is electrically connected to the first signal line,
wherein one of source and drain of the fifth transistor is electrically connected to the second signal line,
wherein one of source and drain of the sixth transistor is electrically connected to the third signal line,
wherein the other of source and drain of the fourth transistor, the other of source and drain of the fifth transistor, and the other of source and drain of the sixth transistor are electrically connected to different wirings, and
wherein channel forming regions of the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are formed in oxide semiconductors.
2. The liquid crystal display device according to claim 1 ,
wherein an off-state current per channel width of 1 μm of each of the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor is 1 zA/μm.
3. The liquid crystal display device according to claim 1 ,
wherein carrier density of the oxide semiconductors is less than 1×10 12 /cm 3 .
4. An electronic device including the liquid crystal display device according to claim 1 and an operation switch.
5. A liquid crystal display device comprising:
a pixel portion including a first pixel performing red display, a second pixel performing blue display, and a third pixel performing green display; and
a circuit configured to inspect the pixel portion, the circuit including a fourth transistor, a fifth transistor, and a sixth transistor,
wherein the first pixel includes a first transistor and a first liquid crystal element,
wherein the second pixel includes a second transistor and a second liquid crystal element,
wherein the third pixel includes a third transistor and a third liquid crystal element,
wherein one of source and drain of the first transistor is electrically connected to a first signal line and the other of source and drain of the first transistor is electrically connected to the first liquid crystal element,
wherein one of source and drain of the second transistor is electrically connected to a second signal line and the other of source and drain of the second transistor is electrically connected to the second liquid crystal element,
wherein one of source and drain of the third transistor is electrically connected to a third signal line and the other of source and drain of the third transistor is electrically connected to the third liquid crystal element,
wherein gates of the fourth transistor, the fifth transistor, and the sixth transistor are electrically connected to each other,
wherein one of source and drain of the fourth transistor is electrically connected to the first signal line,
wherein one of source and drain of the fifth transistor is electrically connected to the second signal line,
wherein one of source and drain of the sixth transistor is electrically connected to the third signal line,
wherein the other of source and drain of the fourth transistor, the other of source and drain of the fifth transistor, and the other of source and drain of the sixth transistor are electrically connected to different wirings,
wherein the wirings are each in a floating state when the circuit does not perform inspection, and
wherein channel forming regions of the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are formed in oxide semiconductors.
6. The liquid crystal display device according to claim 5 ,
wherein an off-state current per channel width of 1 μm of each of the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor is 1 zA/μm.
7. The liquid crystal display device according to claim 5 ,
wherein carrier density of the oxide semiconductors is less than 1×10 12 /cm 3 .
8. An electronic device including the liquid crystal display device according to claim 5 and an operation switch.
9. A liquid crystal display device comprising:
a pixel portion including a first pixel performing red display, a second pixel performing blue display, and a third pixel performing green display; and
a circuit including a fourth transistor, a fifth transistor, and a sixth transistor,
wherein the first pixel includes a first transistor and a first liquid crystal element,
wherein the second pixel includes a second transistor and a second liquid crystal element,
wherein the third pixel includes a third transistor and a third liquid crystal element,
wherein one of source and drain of the first transistor is electrically connected to a first signal line and the other of source and drain of the first transistor is electrically connected to the first liquid crystal element,
wherein one of source and drain of the second transistor is electrically connected to a second signal line and the other of source and drain of the second transistor is electrically connected to the second liquid crystal element,
wherein one of source and drain of the third transistor is electrically connected to a third signal line and the other of source and drain of the third transistor is electrically connected to the third liquid crystal element,
wherein gates of the fourth transistor, the fifth transistor, and the sixth transistor are electrically connected to each other,
wherein one of source and drain of the fourth transistor is electrically connected to the first signal line,
wherein one of source and drain of the fifth transistor is electrically connected to the second signal line,
wherein one of source and drain of the sixth transistor is electrically connected to the third signal line,
wherein the other of source and drain of the fourth transistor, the other of source and drain of the fifth transistor, and the other of source and drain of the sixth transistor are electrically connected to different wirings each in a floating state, and
wherein channel forming regions of the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are formed in oxide semiconductors.
10. The liquid crystal display device according to claim 9 ,
wherein an off-state current per channel width of 1 μm of each of the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor is 1 zA/μm.
11. The liquid crystal display device according to claim 9 ,
wherein carrier density of the oxide semiconductors is less than 1×10 12 /cm 3 .
12. An electronic device including the liquid crystal display device according to claim 9 and an operation switch.