Semiconductor device and method of forming the same
A semiconductor device comprising a substrate, a channel layer over the substrate, an active layer over the channel layer and a laminate layer in contact with the active layer. The active layer has a band gap discontinuity with the channel layer.
1. A semiconductor device comprising:
a substrate;
a channel layer over the substrate;
an active layer over the channel layer, wherein the active layer has a band gap discontinuity with the channel layer; and
a laminate layer separate from a gate and in contact with the active layer, the laminate layer comprising a first crystalline layer, a blocking layer over the first crystalline layer, and a second crystalline layer over the blocking layer.
2. The semiconductor device of claim 1 , further comprising:
a first electrode on the channel layer;
a second electrode on the channel layer; and
the gate between the first electrode and the second electrode, wherein the gate is configured to control a conductivity of a two-dimensional electron gas (2-DEG) between the first electrode and the second electrode.
3. The semiconductor device of claim 2 , wherein the gate is on the laminate layer, and the semiconductor device is configured to be normally conductive.
4. The semiconductor device of claim 2 , further comprising a dielectric layer on the laminate layer, wherein the gate is on the dielectric layer.
5. The semiconductor device of claim 1 , wherein the first crystalline layer or the second crystalline layer comprises at least one semiconductor material selected from AlN and In x Al y Ga z N.
6. The semiconductor device of claim 1 , wherein the blocking layer comprises at least one member selected from AlO x , SiN x , SiO x , MgO, Ga 2 O 3 , La 2 O 3 , HfO 2 , ZrO 2 , Y 2 O 3 , Gd 2 O 3 , Ce 2 O 3 or Ta 2 O 3 .
7. The semiconductor device of claim 1 , wherein a thickness of the first crystalline layer ranges from about 3 Å to about 10 Å.
8. The semiconductor device of claim 1 , wherein a thickness of the blocking layer ranges from about 3 Å to about 50 Å.
9. The semiconductor device of claim 1 , wherein a thickness of the second crystalline layer ranges from about 3 Å to about 50 Å.
10. The semiconductor device of claim 1 , further comprising a passivation layer over the laminate layer.
11. The semiconductor device of claim 10 , further comprising a capping layer over the passivation layer.
12. A transistor comprising:
a substrate;
a buffer layer over the substrate;
a graded layer over the buffer layer;
a channel layer over the graded layer;
an active layer over the channel layer, wherein the active layer has a band gap discontinuity with the channel layer; and
a laminate layer separate from a gate and in contact with the active layer, wherein the laminate layer comprises:
a first crystalline layer, wherein a bottom surface of the first crystalline layer is in contact with a top surface of the active layer;
a blocking layer comprising a bottom surface in contact with a top surface of the first crystalline layer, and
a second crystalline layer over the blocking layer.
13. The transistor of claim 12 , further comprising:
a first electrode on the channel layer;
a second electrode on the channel layer; and
the gate between the first electrode and the second electrode, wherein the gate is configured to control a conductivity of a two-dimensional electron gas (2-DEG) between the first electrode and the second electrode.
14. A semiconductor device, comprising:
a channel layer over a substrate;
an active layer over the channel layer, wherein the active layer has a band gap discontinuity with the channel layer;
a pair of electrodes over the channel layer;
a gate between the pair of electrodes; and
a laminate layer under the gate, the laminate layer comprising blocking layer over the active layer and a second crystalline layer over the blocking layer.
15. The semiconductor device of claim 14 , wherein the laminate layer comprises:
a first crystalline layer over the active layer and under the blocking layer.
16. The semiconductor device of claim 15 , wherein the first crystalline layer or the second crystalline layer comprises at least one semiconductor material selected from AlN or In x Al y Ga z N.
17. The semiconductor device of claim 14 , wherein the blocking layer comprises at least one member selected from AlO x , SiN x , SiO x , MgO, Ga 2 O 3 , La 2 O 3 , HfO 2 , ZrO 2 , Y 2 O 3 , Gd 2 O 3 , Ce 2 O 3 or Ta 2 O 3 .