IP Library Granted Patent US 9,859,146
Granted Patent B2
US 9,859,146 · App. 14/238,860 · Granted Jan 2, 2018

Semiconductor manufacturing device and processing method

Inventors: Shinji Himori (Miyagi, JP); Yoshiyuki Kobayashi (Miyagi, JP); Takehiro Kato (Miyagi, JP); Etsuji Ito (Miyagi, JP)
Assignee: TOKYO ELECTRON LIMITED
H01L21/68742H01L21/30604H01L21/67063
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Quick Facts
Patent No.
US 9,859,146
App. No.
14/238,860
Granted
Jan 2, 2018
Kind
B2
Abstract

A semiconductor manufacturing device includes a stage, a plurality of pins, and a driving unit. The stage includes a mounting surface. The mounting surface has a first region for mounting thereon a substrate, and a second region for mounting thereon a focus ring. The second region is provided to surround the first region. A plurality of holes is formed in the stage. The holes extend in a direction that intersects the mounting surface while passing through the boundary between the first region and the second region. The pins are provided in the respective holes. Each of the pins has a first and a second upper end surface. The second upper end surface is provided above the first upper end surface, and is offset towards the first region with respect to the first upper end surface. The driving unit moves the pins up and down in the aforementioned direction.

Claims (18)

1. A semiconductor manufacturing device comprising:

a processing chamber defining a processing space;

a stage provided in the processing chamber, the stage having a mounting surface which has a first region for mounting thereon a substrate to be processed and a second region for mounting thereon a focus ring, and having a plurality of holes extending in a direction that intersects the mounting surface, the second region of the mounting surface being disposed to surround the first region of the mounting surface;

a plurality of pins which are respectively provided in the holes, each pin having a first upper end surface configured to lift up the focus ring from the second region of the mounting surface and a second upper end surface configured to lift up the substrate from the first region of the mounting surface, wherein the second upper end surface is offset towards the first region of the mounting surface with respect to the first upper end surface and wherein the second upper end surface is located above the first upper end surface;

a driving unit configured to vertically move the pins in the extending direction of the holes; and

a control unit configured to (i) control, in a first mode of lifting up the substrate, the driving unit to move upward the pins to a first height such that the second upper end surfaces of the pins protrude above the first region of the mounting surface to lift the substrate while the first upper end surfaces of the pins are maintained below the second region of the mounting surface and do not lift the focus ring, and (ii) control, in a second mode of lifting up the focus ring, the driving unit to move upward the pins to a second height greater than the first height such that the first upper end surfaces of the pins protrude above the second region of the mounting surface to lift the focus ring,

wherein the first upper end surfaces of the pins are configured to move in unison with the second upper end surfaces of the pins.

2. The semiconductor manufacturing device of claim 1 ,

wherein each pin includes a first columnar portion and a second columnar portion,

wherein the first columnar portion includes the second upper end surface and the second columnar portion includes the first upper end surface, and

wherein a thickness of the first columnar portion is less than a thickness of the second columnar portion.

3. A semiconductor manufacturing device comprising:

a processing chamber defining a processing space;

a stage provided in the processing chamber, the stage having a mounting surface which has a first region for mounting thereon a substrate to be processed and a second region for mounting thereon a focus ring, and having a plurality of holes extending in a direction perpendicular to the mounting surface, the second region of the mounting surface being disposed to surround the first region of the mounting surface;

a plurality of pins which are respectively provided in the holes, each pin including a first columnar portion and a second columnar portion provided above the first columnar portion, the first columnar portion having a first upper end surface configured to lift up the focus ring from the second region of the mounting surface and the second columnar portion having a second upper end surface configured to lift up the substrate from the first region of the mounting surface, wherein the second upper end surface is offset towards the first region of the mounting surface with respect to the first upper end surface and wherein the second upper end surface is located above the first upper end surface;

a driving unit configured to vertically move the pins in the extending direction of the holes; and

a control unit configured to (i) control, in a first mode of lifting up the substrate, the driving unit to move upward the pins to a first height such that the second upper end surfaces of the pins protrude above the first region of the mounting surface to lift the substrate while the first upper end surfaces of the pins are maintained below the second region of the mounting surface and do not lift the focus ring, and (ii) control, in a second mode of lifting up the focus ring, the driving unit to move upward the pins to a second height greater than the first height such that the first upper end surfaces of the pins protrude above the second region of the mounting surface to lift the focus ring,

wherein the first upper end surfaces of the pins are configured to move in unison with the second upper end surfaces of the pins.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 13, 2014
From: HIMORI, SHINJI; KOBAYASHI, YOSHIYUKI; KATO, TAKEHIRO; ITO, ETSUJI
To: TOKYO ELECTRON LIMITED
Reel/Frame 032425/0957 →
Priority Claims (1)
JP 2011-178494 · Aug 17, 2011 · national
Continuity (2)
Provisional Application 61528333 · Aug 29, 2011
Related Publication 20140213055A1 · Jul 31, 2014