IP Library › Granted Patent US 9,859,213
Granted Patent B2
US 9,859,213 · App. 15/370,109 · Granted Jan 2, 2018

Metal via structure

Inventor: Dyi-Chung Hu (Hsinchu, TW)
H01L23/528H01L21/7685H01L21/76895H01L23/53214H01L23/53228H01L23/53242H01L23/53266
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Quick Facts
Patent No.
US 9,859,213
App. No.
15/370,109
Granted
Jan 2, 2018
Kind
B2
Abstract

A filled metal via having an adhesive layer configured on bottom is disclosed. The adhesive layer enhances bonding force between the filled metal via and a bottom element. Further, stacked metal vias can be made to save spaces to enhance circuit density for an electronic system.

Claims (20)

1. A metal via structure, comprising:

a bottom metal, having a top surface exposed from a first dielectric layer;

a first adhesive layer, configured on a top surface of the bottom metal;

a first metal block, configured on a top surface of the first adhesive layer; having a top surface coplanar with a top surface of the first dielectric layer;

a second adhesive layer, configured on the top surface of the first dielectric layer; having a first end extended to cover a top surface of the first metal block; and a first metal circuit, configured on a top surface of the second adhesive layer; and

a second dielectric layer, configured on a top surface of the first metal circuit; a top surface of an area of the first metal circuit aligned with the first metal block as seen in a plan view, exposed from the second dielectric laver; a third adhesive layer, configured on the top surface of the exposed area of the first metal circuit; and a second metal block, configured on a top surface of the third adhesive layer, having a top surface coplanar with a top surface of the second dielectric layer.

2. A metal via structure as claimed in claim 1 , wherein the first adhesive layer extends to wrap side surfaces of the first metal block so that the metal block does not contact with the first dielectric layer directly.

3. A metal via structure as claimed in claim 1 , wherein the first metal block is a conductive material selected from a group consisting of Au, Ag, Cu and Al.

4. A metal via structure as claimed in claim 1 , wherein the first adhesive layer is a conductive material selected from a group consisting of Ti, Cr, Nb, W, and TiW.

5. A metal via structure as claimed in claim 1 , wherein the first adhesive layer has a thickness less than 1 um.

6. A metal via structure as claimed in claim 5 , wherein the first adhesive layer has a thickness roughly of 0.3 um.

7. A metal via structure as claimed in claim 1 , wherein the bottom metal is selected from a group consisting of a metal pad, metal circuit, through silicon via, through glass via, and through mold via.

8. A metal via structure as claimed in claim 1 , wherein the first metal circuit is a conductive material selected from a group consisting of Au, Ag, Cu and Al.

9. A metal via structure as claimed in claim 1 , wherein the second adhesive layer is a conductive material selected from a group consisting of Ti, Cr, Nb, W, and TiW.

10. A metal via structure as claimed in claim 1 , wherein the third adhesive layer extends to wrap side surfaces of the second metal block.

11. A metal via structure as claimed in claim 1 , wherein the second metal block is a conductive material selected from a group consisting of Au, Ag, Cu and Al.

12. A metal via structure as claimed in claim 1 , wherein the third adhesive layer is a conductive material selected from a group consisting of Ti, Cr, Nb, W, and TiW.

13. A metal via structure as claimed in claim 1 , wherein the third adhesive layer has a thickness less than 1 um.

14. A metal via structure as claimed in claim 13 , wherein the first adhesive layer has a thickness roughly of 0.3 um.

15. A metal via structure as claimed in claim 1 , further comprising: a fourth adhesive layer, configured on the top surface of the second dielectric layer; having an end extended to cover a top surface of the second metal block; and a second metal circuit, configured on the top surface of the fourth adhesive layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 6, 2026
From: HU, DYI-CHUNG
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
Reel/Frame 075543/0215 →
Continuity (2)
Provisional Application 62264086 · Dec 7, 2015
Related Publication 20170162497A1 · Jun 8, 2017