IP Library › Granted Patent US 9,887,230
Granted Patent B2
US 9,887,230 · App. 14/430,727 · Granted Feb 6, 2018

Separation type unit pixel of image sensor having three-dimensional structure

Inventor: Jae Won Eom (Suwon-si, KR)
Assignee: SK Hynix Inc.
H01L27/14643H01L27/148H01L27/14612H01L27/14636
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Quick Facts
Patent No.
US 9,887,230
App. No.
14/430,727
Granted
Feb 6, 2018
Kind
B2
Abstract

The present invention introduces a separation type unit pixel of an image sensor having a three-dimensional (3D) structure, which is capable of maximizing transmission efficient of a charge generated through a photodiode to a floating diffusion area. The separation type unit pixel may include a first wafer on which a photodiode and a transmission transistor are formed and a second wafer on which a reset transistor and a source follower transistor are formed. In particular, the photodiode has a positive region to which an N_ground voltage is applied, the N_ground voltage having a lower voltage level than a ground voltage used in the second wafer.

Claims (39)

1. A separation type unit pixel of an image sensor which generates a converted voltage corresponding to incident light, the separation type unit pixel comprising:

a first wafer comprising a photodiode configured to generate a charge corresponding to incident light, a first pad, and a transmission transistor configured to transmit the charge generated through the photodiode to the first pad in response to a transmission control signal; and

a second wafer comprising a second pad, a source follower transistor configured to generate a converted voltage corresponding to a charge transmitted to the second pad, and a reset transistor configured to commonly reset the second pad and a gate of the source follower transistor in response to a reset control signal,

wherein the photodiode of the first wafer has a positive region to which a voltage having a lower level than a ground voltage used in the second wafer is applied.

2. The separation type unit pixel of claim 1 , wherein the transmission transistor has one terminal coupled to a negative region of the photodiode, the other terminal coupled to the first pad, and a gate configured to receive the transmission control signal,

the reset transistor has one terminal coupled to one of a power supply voltage and a second power supply voltage having a different voltage level from the power supply voltage, the other terminal commonly coupled to the second pad and the gate of the source follower transistor, and a gate configured to receive the reset control signal, and

the source follower transistor has one terminal coupled to the power supply voltage and the other terminal configured to output the converted voltage.

3. The separation type unit pixel of claim 2 , wherein the second wafer further comprises a select transistor configured to switch the converted voltage generated through the source follower transistor in response to a select control signal, and

the select transistor has a gate configured to receive the select control signal, one terminal coupled to the other terminal of the source follower transistor, and the other terminal configured to output the converted voltage.

4. A separation type unit pixel of an image sensor which generates a converted voltage corresponding to incident light, the separation type unit pixel comprising:

a first wafer comprising a photodiode configured to generate a charge corresponding to incident light, a first pad, a transmission transistor configured to transmit the charge generated through the photodiode to the first pad in response to a transmission control signal, and a reset transistor configured to reset a common terminal of the first pad and the transmission transistor in response to a reset control signal; and

a second wafer comprising a second pad and a source follower transistor configured to generate a converted voltage corresponding to a charge transmitted to the second pad,

wherein the photodiode of the first wafer has a positive region to which a voltage having a lower level than a ground voltage used in the second wafer is applied.

5. The separation type unit pixel of claim 4 , wherein the transmission transistor has one terminal coupled to a negative region of the photodiode, the other terminal coupled to the first pad, and a gate configured to receive the transmission control signal,

the reset transistor has one terminal coupled to one of a power supply voltage and a second power supply voltage having a different voltage level from the power supply voltage, the other terminal commonly coupled to the first pad and the other terminal of the transmission transistor, and a gate configured to receive the reset control signal, and

the source follower transistor has one terminal coupled to the power supply voltage, a gate coupled to the second pad, and the other terminal configured to output the converted voltage.

6. The separation type unit pixel of claim 5 , wherein the second wafer further comprises a select transistor configured to switch the converted voltage generated through the source follower transistor in response to a select control signal, and

the select transistor has a gate configured to receive the select control signal, one terminal coupled to the other terminal of the source follower transistor, and the other terminal configured to output the converted voltage.

7. A separation type unit pixel of an image sensor which generates a converted voltage corresponding to incident light, the separation type unit pixel comprising:

a first wafer comprising a first pad, a first photodiode configured to generate a charge corresponding to incident light, a first transmission transistor configured to transmit the charge generated through the first photodiode to the first pad in response to a first transmission control signal, a second photodiode configured to generate a charge corresponding to incident light, and a second transmission transistor configured to transmit the charge generated through the second photodiode to the first pad in response to a second transmission control signal; and

a second wafer comprising a second pad, a source follower transistor configured to generate a converted voltage corresponding to a charge transmitted to the second pad, and a reset transistor configured to commonly reset the second pad and a gate of the source follower transistor in response to a reset control signal,

wherein each of the first and second photodiodes of the first wafer has a positive region to which a voltage having a lower level than a ground voltage used in the second wafer is applied.

8. The separation type unit pixel of claim 7 , wherein the first photodiode receives the voltage having a lower level than the ground voltage through the positive region thereof,

the first transmission transistor has one terminal coupled to a negative region of the first photodiode, the other terminal coupled to the first pad, and a gate configured to receive the first transmission control signal,

the second photodiode receives the voltage having a lower level than the ground voltage through the positive region thereof,

the second transmission transistor has one terminal coupled to the negative region of the second photodiode, the other terminal coupled to the first pad, and a gate configured to receive the second transmission control signal,

the reset transistor has one terminal coupled to one of a power supply voltage and a second power supply voltage having a voltage level different from the power supply voltage, the other terminal coupled to the second pad, and a gate configured to receive the reset control signal, and

the source follower transistor has one terminal coupled to the power supply voltage and the other terminal configured to output a converted voltage corresponding to a charge stored in the second pad and the other terminal of the reset transistor.

9. The separation type unit pixel of claim 8 , wherein the second wafer further comprises a select transistor configured to switch the converted voltage generated through the source follower transistor in response to a select control signal, and

the select transistor has a gate configured to receive the select control signal, one terminal coupled to the other terminal of the source follower transistor, and the other terminal configured to output the converted voltage.

10. The separation type unit pixel of claim 1 , wherein the first and second pads are electrically coupled to each other through a pad coupling unit.

11. The separation type unit pixel of claim 2 , wherein the first and second pads are electrically coupled to each other through a pad coupling unit.

12. The separation type unit pixel of claim 3 , wherein the first and second pads are electrically coupled to each other through a pad coupling unit.

13. The separation type unit pixel of claim 4 , wherein the first and second pads are electrically coupled to each other through a pad coupling unit.

14. The separation type unit pixel of claim 5 , wherein the first and second pads are electrically coupled to each other through a pad coupling unit.

15. The separation type unit pixel of claim 6 , wherein the first and second pads are electrically coupled to each other through a pad coupling unit.

16. The separation type unit pixel of claim 7 , wherein the first and second pads are electrically coupled to each other through a pad coupling unit.

17. The separation type unit pixel of claim 8 , wherein the first and second pads are electrically coupled to each other through a pad coupling unit.

18. The separation type unit pixel of claim 9 , wherein the first and second pads are electrically coupled to each other through a pad coupling unit.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 20, 2017
From: SILICONFILE TECHNOLOGIES INC.
To: SK HYNIX INC.
Reel/Frame 041023/0187 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 24, 2015
From: EOM, JAE WON
To: SILICONFILE TECHNOLOGIES INC.
Reel/Frame 035307/0091 →
Priority Claims (1)
KR 10-2012-0107112 · Sep 26, 2012 · national
Continuity (1)
Related Publication 20150236065A1 · Aug 20, 2015