Semiconductor packaging and manufacturing method thereof
The present disclosure provides a semiconductor package includes a contact pad, a device external to the contact pad and a solder bump on the contact pad. The device has a conductive contact pad corresponding to the contact pad. The solder bump connects the contact pad with the conductive contact pad. The solder bump comprises a height from a top of the solder bump to the contact pad; and a width which is a widest dimension of the solder bump in a direction perpendicular to the height. A junction portion of the solder bump in proximity to the contact pad comprises an hourglass shape.
1. A semiconductor package, comprising:
a contact pad;
a solder bump over the contact pad, wherein the solder bump comprises:
a height from a top of the solder bump to the contact pad;
a width which is a widest dimension of the solder bump in a direction perpendicular to the height; and
a first junction portion of the solder bump and a solder paste layer, between the widest dimension of the solder bump and the contact pad, comprises an hourglass shape; and
a molding compound laterally in contact with the first junction portion of the solder bump and the solder paste layer and only a lower portion of the solder bump.
2. The semiconductor package of claim 1 , further comprising a molding compound surrounding the first junction portion of the solder bump and the solder paste layer and a lower portion of the solder bump, the lower portion of the solder bump being in proximity to the contact pad.
3. The semiconductor package of claim 2 , further comprising a device external to the contact pad and including a conductive pad projectively corresponding to the contact pad.
4. The semiconductor package of claim 3 , further comprising a second junction portion of the solder bump in proximity to the conductive pad, the second junction portion of the solder bump comprises an hourglass shape.
5. The semiconductor package of claim 1 , wherein the first junction portion of the solder bump comprises SnX alloys having an alloy melting temperature lower than 165 degrees Celsius, wherein the X comprises Bi, Sb, Pb, Ge, Al, Ga, In, Tl, and the arbitrary combination thereof.
6. The semiconductor package of claim 1 , wherein a concentration of the X decreases from the first junction portion of the solder bump and the solder paste layer to the top of the solder bump.
7. A semiconductor package, comprising:
a contact pad;
a device external to the contact pad and including a conductive contact pad corresponding to the contact pad;
a solder bump connecting the contact pad with the conductive contact pad, wherein the solder bump comprises:
a height from a top of the solder bump to the contact pad; and
a width which is a widest dimension of the solder bump in a direction perpendicular to the height; and
a molding compound surrounding the junction portion of the solder bump and the solder paste layer and a lower portion of the solder bump, wherein a thickness of the molding compound is from about 0.4 times to about 0.6 times of the height of the solder bump, and wherein the lower portion of the solder bump is in proximity to the contact pad,
wherein a junction portion of the solder bump and a solder paste layer is between the widest dimension of the solder bump and the contact pad.
8. The semiconductor package in claim 7 , further comprising an underfill layer surrounding an upper portion of the solder bump, wherein the upper portion of the solder bump is in proximity to the top of the solder bump.
9. The semiconductor package in claim 7 , wherein the height to the width ratio of the solder bump is about from 0.85 to about 1.15.
10. The semiconductor package in claim 7 , wherein the junction portion of the solder bump and the solder paste comprises SnX alloys having an alloy melting temperature lower than 165 degrees Celsius.
11. The semiconductor package in claim 10 , wherein a concentration of X decreases from the junction portion of the solder bump and the solder paste layer to the top of the solder bump.
12. The semiconductor package in claim 10 , wherein the X in the SnX alloys comprises Bi, Sb, Pb, Ge, Al, Ga, In, Tl, and the arbitrary combination thereof.
13. The semiconductor package in claim 7 , wherein the solder bump comprises Sn, Ag, Cu, Pb, Bi, Sb, and the arbitrary combination thereof.
14. A semiconductor package, comprising:
a ball grid array (BGA) including a plurality of contact pads, wherein each of the plurality of contact pads is connected with a solder bump at one end of the solder bump, wherein a finest pitch in the BGA is less than about 0.2 mm; and,
a circuit board including a plurality of conductive contact pads, wherein each of the plurality of conductive contact pads is electrically connected with the BGA at the other end of the solder bump;
wherein the solder bump includes:
a height from a top of the solder bump to the contact pad; and
a width which is a widest dimension of the solder bump in a direction perpendicular to the height; and
wherein a junction portion of the solder bump and a solder paste layer between the widest dimension of the solder bump and the contact pad comprises an hourglass shape, and a molding compound laterally in contact with the junction portion of the solder bump and the solder paste layer and only a lower portion of the solder bump.
15. The semiconductor package in claim 14 , wherein the junction portion of the solder bump and the solder paste layer comprises a zero curvature.
16. The semiconductor package in claim 14 , an angle between the contact pad and a narrowest point on a contour of the junction portion of the solder bump and the solder paste layer is less than 90 degrees.
17. The semiconductor package in claim 14 , wherein the junction portion of the solder bump and the solder paste layer comprises a narrowest width.
18. The semiconductor package in claim 14 , wherein the junction portion of the solder bump and the solder paste layer comprises SnX alloys having an alloy melting temperature lower than 165 degrees Celsius, wherein the X comprises Bi, Sb, Pb, Ge, Al, Ga, In, Tl, and the arbitrary combination thereof.
19. The semiconductor package in claim 18 , wherein a concentration of the X decreases from the junction portion of the solder bump and the solder paste layer to the top of the solder bump.