IP Library Granted Patent US 9,966,277
Granted Patent B2
US 9,966,277 · App. 15/361,108 · Granted May 8, 2018

Arrangement and method for manufacturing the same

Inventors: Markus Zundel (Egmating, DE); Andre Schmenn (Sachsenkam, DE); Damian Sojka (Regensburg, DE); Isabella Goetz (Regensburg, DE); Gudrun Stranzl (Goedersdorf, AT); Sebastian Werner (Villach, AT); Thomas Fischer (Regensburg, DE); Carsten Ahrens (Pettendorf, DE); Edward Fuergut (Dasing, DE)
Assignee: Infineon Technologies AG
H01L21/561H01L21/78H01L23/3114H01L23/3171H01L23/49838H01L27/0248H01L27/0255H01L29/861H01L2224/16H01L2924/0002H01L2924/13055
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,966,277
App. No.
15/361,108
Granted
May 8, 2018
Kind
B2
Abstract

An arrangement is provided. The arrangement may include: a substrate having a front side and a back side, a die region within the substrate, a multi-purpose layer defining a back side of the die region, and an etch stop layer disposed over the multi-purpose layer between the multi-purpose layer and the back side of the substrate. The multi-purpose layer may be formed of an ohmic material, and the etch stop layer may be of a first conductivity type of a first doping concentration.

Claims (29)

1. A method for forming a die in a substrate, comprising:

providing the substrate having a front side and a back side, the front side defining one or more die regions within the substrate; wherein each of the one or more die regions comprises a plurality of insulating barriers extending through the die region;

forming a multi-purpose layer defining a back side of the die region; wherein the multi-purpose layer is formed of an ohmic material; and

forming an etch stop layer disposed over the multi-purpose layer between the multi-purpose layer and the back side of the substrate; wherein the etch stop layer is of a first conductivity type of a first doping concentration; and

mechanically thinning the substrate from the back side thereof to the etch stop layer.

2. The method of claim 1 , further comprising:

etching the substrate from the back side thereof using the etch stop layer as an etch stop.

3. The method of claim 1 , further comprising:

etching selectively at least a portion of the etch stop layer using the multi-purpose layer as an etch stop.

4. The method of claim 3 , further comprising:

wherein discrete contacts formed of ohmic material remain following etching selectively at least a portion of the multi-purpose layer.

5. The method of claim 1 , further comprising:

forming the multi-purpose layer and the etch stop layer as a double peak distribution.

6. The method of claim 1 , further comprising:

forming trenches into the substrate between die regions;

wherein an encapsulation material is formed at least partially on sidewalls of the trenches.

7. The method of claim 6 , further comprising:

removing wafer material from the back side of the substrate to at least partially expose the encapsulation material formed in the trenches, so that the encapsulation material mechanically holds a plurality of dies within the die regions.

8. The method of claim 1 , wherein at least one of the die regions further comprises at least two electronic components separated by the plurality of insulating barriers.

9. A method for manufacturing an arrangement, the method comprising:

forming a die region in a substrate having a front side and a back side; wherein the die region comprises a plurality of insulating barriers extending through the die region;

forming a multi-purpose layer defining a back side of the die region;

forming an etch stop layer disposed over the multi-purpose between the multi-purpose layer and the back side of the substrate;

forming at least one back side terminal on a backside of the die region from the multi-purpose layer;

forming at least one front side terminal on a front side of the die region; and

forming encapsulation material over the front side of the substrate covering the die region;

wherein the multi-purpose layer is formed of an ohmic material; and

wherein the etch stop layer is of a first conductivity type of a first doping concentration.

10. The method of claim 9 , wherein the etch stop layer a silicon on insulator structure.

Continuity (3)
Division 14598288 · Jan 16, 2015
Continuation In Part 14042750 · Oct 1, 2013
Related Publication 20170076961A1 · Mar 16, 2017