Polysilicon residue removal in nanosheet MOSFETs
A method is presented for forming a semiconductor device. The method includes depositing a sacrificial layer on a fin structure formed on a substrate and then filled with polysilicon, etching a portion of the polysilicon material via a first etching process, and pre-cleaning the surface native oxide layer. The method further includes etching the remaining polysilicon material via a second etching process, and removing polysilicon etch residue formed adjacent the fin structure by a cleaning process. The pre-cleaning is performed by applying ammonia (NH 3 ) and nitrogen trifluoride (NF 3 ) or by applying buffered hydrofluoric acid (BHF). The first etching process is reactive ion etching (RIE) and the second etching process involves applying nitrogen trifluoride (NF 3 ) and hydrogen gas (H 2 ).
1. A method of forming a semiconductor device, the method comprising:
etching a portion of a polysilicon material deposited over a dielectric layer of a fin via a first etching process such that remaining polysilicon material covers the fin;
etching the remaining polysilicon material via a second etching process resulting in polysilicon etch residue formed on portions of the fin; and
removing the polysilicon etch residue by a cleaning process.
2. The method of claim 1 , wherein the fin is formed by alternating layers of silicon (Si) and silicon germanium (SiGe).
3. The method of claim 1 , wherein the cleaning process exposes the dielectric layer.
4. The method of claim 1 , wherein the cleaning process is a wet etch cleaning process.
5. The method of claim 1 , further comprising pre-cleaning a surface of the remaining polysilicon material.
6. The method of claim 5 , wherein the pre-cleaning is performed by applying ammonia (NH 3 ) and nitrogen trifluoride (NF 3 ).
7. The method of claim 5 , wherein the pre-cleaning is performed by applying buffered hydrofluoric acid (BHF).
8. The method of claim 1 , wherein the first etching process is reactive ion etching (RIE) and the second etching process involves applying nitrogen trifluoride (NF 3 ) and hydrogen gas (H 2 ).
9. The method of claim 8 , wherein the nitrogen trifluoride (NF 3 ) flow is about 100 sccm-300 sccm and the H 2 flow is about 1000 sccm-5000 sccm.
10. The method of claim 8 , wherein the second etching process has an etch rate of about 200 Å/minute and an anneal time of about 1 minutes to about 5 minutes.
11. A method of forming nanosheet metal oxide semiconductor field effect transistors (MOSFETs), the method comprising:
forming a plurality of fins each including a first material and a second material arranged in an alternating configuration;
forming a polysilicon material over the plurality of fins;
etching a portion of the polysilicon material deposited via a first etching process such that remaining polysilicon material covers the plurality of fins;
etching the remaining polysilicon material via a second etching process resulting in polysilicon etch residue formed on the plurality of fins;
removing the polysilicon etch residue by a cleaning process; and
removing either the first material or the second material to form the nanosheet MOSFETs.
12. The method of claim 11 , wherein the first material is silicon (Si) and the second material is silicon germanium (SiGe).
13. The method of claim 11 , wherein the cleaning process is a wet etch cleaning process.
14. The method of claim 11 , further comprising pre-cleaning a surface of the remaining polysilicon material.
15. The method of claim 14 , wherein the pre-cleaning is performed by applying ammonia (NH 3 ) and nitrogen trifluoride (NF 3 ).
16. The method of claim 14 , wherein the pre-cleaning is performed by applying buffered hydrofluoric acid (BHF).
17. The method of claim 14 , wherein the pre-cleaning involves an isotropic process.
18. The method of claim 11 , wherein the first etching process is reactive ion etching (RIE) and the second etching process involves applying nitrogen trifluoride (NF 3 ) and hydrogen gas (H 2 ).
19. The method of claim 11 , wherein the plurality of fins include a dielectric liner formed before deposition of the polysilicon material.
20. The method of claim 19 , wherein the cleaning process exposes the dielectric layer.