IP Library › Granted Patent US 10,008,541
Granted Patent B2
US 10,008,541 · App. 14/993,306 · Granted Jun 26, 2018

Memory arrays and methods of forming an array of memory cell

Inventors: Scott E. Sills (Boise, ID); Durai Vishak Nirmal Ramaswamy (Boise, ID)
Assignee: Micron Technology, Inc.
H01L27/2436H01L27/2463H01L45/08H01L45/085H01L45/124H01L45/1233H01L45/1253H01L45/141H01L45/145H01L45/16H01L45/1616H01L45/1666H01L45/1691
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Quick Facts
Patent No.
US 10,008,541
App. No.
14/993,306
Granted
Jun 26, 2018
Kind
B2
Abstract

A method of forming an array of memory cells includes forming lines of covering material that are elevationally over and along lines of spaced sense line contacts. Longitudinal orientation of the lines of covering material is used in forming lines comprising programmable material and outer electrode material that are between and along the lines of covering material. The covering material is removed over the spaced sense line contacts and the spaced sense line contacts are exposed. Access lines are formed. Sense lines are formed that are electrically coupled to the spaced sense line contacts. The sense lines are angled relative to the lines of spaced sense line contacts and relative to the access lines. Other embodiments, including structure independent of method, are disclosed.

Claims (33)

1. A method of forming an array of memory cells, comprising:

forming lines of covering material that are elevationally over and along lines of spaced sense line contacts;

longitudinally lining void space between the lines of covering material with programmable material;

depositing outer electrode material over the programmable material to over-fill remaining void space between the lines of covering material;

removing the outer electrode material back at least to an elevationally outermost surface of the covering material to form lines comprising the programmable material and the outer electrode material, and to form coplanar elevationally outermost surfaces of the covering material and the outer electrode material;

removing the covering material over the spaced sense line contacts and exposing the spaced sense line contacts;

forming access lines; and

forming sense lines that are electrically coupled to the spaced sense line contacts, the sense lines angling longitudinally perpendicular relative to longitudinal orientation of the lines of spaced sense line contacts and relative to longitudinal orientation of the access lines.

2. The method of claim 1 comprising also removing the programmable material back at least to the elevationally outermost surface of the covering material to form a planar outermost surface of the programmable material that is coplanar with the elevationally outermost surfaces of the covering material and the outer electrode material.

3. The method of claim 1 comprising elevationally recessing the outer electrode material relative to the covering material after forming the coplanar elevationally outermost surfaces.

4. The method of claim 1 wherein the removing of the covering material is of all of the covering material of the lines of covering material, and further comprising:

after removing the covering material, depositing a first dielectric to be thicker atop the lines comprising outer electrode material and programmable material than over bases between the lines comprising outer electrode material and programmable material; and

forming a second dielectric over the first dielectric to cover sidewalls of the lines comprising outer electrode material and programmable material.

5. The method of claim 1 comprising forming anisotropically etched sidewall spacers against sidewalls of the lines of covering material, and forming the lines comprising programmable material and outer electrode material between the spacers of adjacent lines of covering material.

6. The method of claim 1 wherein the removing is of only a portion of the covering material of the lines of covering material.

7. The method of claim 1 wherein the removing is of all of the covering material of the lines of covering material.

8. A method of forming an array of memory cells, comprising:

forming lines of covering material that are elevationally over and along lines of spaced sense line contacts;

longitudinally lining void space between the lines of covering material with programmable material;

depositing outer electrode material over the programmable material to over-fill remaining void space between the lines of covering material;

removing the outer electrode material back at least to an elevationally outermost surface of the covering material to form lines comprising the programmable material and the outer electrode material, and to form coplanar elevationally outermost surfaces of the covering material and the outer electrode material;

removing the covering material over the spaced sense line contacts and exposing the spaced sense line contacts;

forming access lines; and

forming sense lines that are electrically coupled to the spaced sense line contacts.

9. The method of claim 8 comprising also removing the programmable material back at least to the elevationally outermost surface of the covering material to form a planar outermost surface of the programmable material that is coplanar with the elevationally outermost surfaces of the covering material and the outer electrode material.

10. The method of claim 8 comprising elevationally recessing the outer electrode material relative to the covering material after forming the coplanar elevationally outermost surfaces.

11. The method of claim 8 wherein the removing of the covering material is of all of the covering material of the lines of covering material, and further comprising:

after removing the covering material, depositing a first dielectric to be thicker atop the lines comprising outer electrode material and programmable material than over bases between the lines comprising outer electrode material and programmable material; and

forming a second dielectric over the first dielectric to cover sidewalls of the lines comprising outer electrode material and programmable material.

12. The method of claim 8 comprising forming anisotropically etched sidewall spacers against sidewalls of the lines of covering material, and forming the lines comprising programmable material and outer electrode material between the spacers of adjacent lines of covering material.

13. The method of claim 8 wherein the removing is of only a portion of the covering material of the lines of covering material.

14. The method of claim 8 wherein the removing is of all of the covering material of the lines of covering material.

15. The method of claim 8 wherein the covering material comprises dielectric material.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
Continuity (2)
Division 13485488 · May 31, 2012
Related Publication 20160126290A1 · May 5, 2016