IP Library › Granted Patent US 10,008,929
Granted Patent B2
US 10,008,929 · App. 15/176,252 · Granted Jun 26, 2018

DC-DC converter and semiconductor device

Inventors: Jun Koyama (Kanagawa, JP); Kei Takahashi (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H02M3/156G09G3/2092H01L27/1222H01L27/1225H01L29/7869H01L29/78696H02M3/33523H02M3/33553H03K7/08
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Quick Facts
Patent No.
US 10,008,929
App. No.
15/176,252
Granted
Jun 26, 2018
Kind
B2
Abstract

A DC-DC converter with low power consumption and high power conversion efficiency is provided. The DC-DC converter includes a first transistor and a control circuit. The control circuit includes an operational amplifier generating a signal that controls switching of the first transistor, a bias circuit generating a bias potential supplied to the operational amplifier, and a holding circuit holding the bias potential. The holding circuit includes a second transistor and a capacitor to which the bias potential is supplied. The first transistor and the second transistor include a first oxide semiconductor film and a second oxide semiconductor film, respectively. The first oxide semiconductor film and the second oxide semiconductor film each contain In, M (M is Ga, Y, Zr, La, Ce, or Nd), and Zn. The atomic ratio of In to M in the first oxide semiconductor film is higher than that in the second oxide semiconductor film.

Claims (64)

1. A semiconductor device comprising:

an operational amplifier;

a first transistor; and

a second transistor over the first transistor with an insulating film interposed therebetween,

wherein an output terminal of the operational amplifier is electrically connected to a gate of the first transistor,

wherein a first terminal of the first transistor is electrically connected to an output terminal of the semiconductor device,

wherein a first terminal of the second transistor is electrically connected to the operational amplifier,

wherein the first transistor comprises a first oxide semiconductor film comprising a channel formation region, and

wherein the second transistor comprises a second oxide semiconductor film comprising a channel formation region.

2. The semiconductor device according to claim 1 ,

wherein the operational amplifier is configured to generate a control signal supplied to the gate of the first transistor,

wherein the first transistor is configured to supply a voltage from the output terminal of the semiconductor device, and

wherein the second transistor is configured to hold a bias potential supplied to the operational amplifier.

3. The semiconductor device according to claim 2 , further comprising a capacitor,

wherein the capacitor is configured to hold a charge corresponding to the bias potential.

4. The semiconductor device according to claim 1 , further comprising a coil between the first terminal of the first transistor and the output terminal of the semiconductor device.

5. The semiconductor device according to claim 4 , further comprising a diode between the first terminal of the first transistor and a second output terminal of the semiconductor device,

wherein a second terminal of the first transistor is electrically connected to a power source.

6. The semiconductor device according to claim 1 , further comprising a coil between the first terminal of the first transistor and a power source.

7. The semiconductor device according to claim 6 , further comprising a diode between the first terminal of the second transistor and the output terminal of the semiconductor device,

wherein a second terminal of the first transistor is electrically connected to a second output terminal of the semiconductor device.

8. A semiconductor device comprising:

an operational amplifier;

a first transistor; and

a second transistor over the first transistor with an insulating film interposed therebetween,

wherein an output terminal of the operational amplifier is electrically connected to a gate of the first transistor,

wherein a first terminal of the first transistor is electrically connected to an output terminal of the semiconductor device,

wherein a first terminal of the second transistor is electrically connected to the operational amplifier,

wherein the first transistor comprises a first oxide semiconductor film comprising a channel formation region and a pair of first gate electrodes between which the first semiconductor film is provided, and

wherein the second transistor comprises a second oxide semiconductor film comprising a channel formation region and a pair of second gate electrodes between which the second semiconductor film is provided.

9. The semiconductor device according to claim 8 ,

wherein the operational amplifier is configured to generate a control signal supplied to the gate of the first transistor,

wherein the first transistor is configured to supply a voltage from the output terminal of the semiconductor device, and

wherein the second transistor is configured to hold a bias potential supplied to the operational amplifier.

10. The semiconductor device according to claim 9 , further comprising a capacitor,

wherein the capacitor is configured to hold a charge corresponding to the bias potential.

11. The semiconductor device according to claim 8 , further comprising a coil between the first terminal of the first transistor and the output terminal of the semiconductor device.

12. The semiconductor device according to claim 11 , further comprising a diode between the first terminal of the first transistor and a second output terminal of the semiconductor device,

wherein a second terminal of the first transistor is electrically connected to a power source.

13. The semiconductor device according to claim 8 , further comprising a coil between the first terminal of the first transistor and a power source.

14. The semiconductor device according to claim 13 , further comprising a diode between the first terminal of the second transistor and the output terminal of the semiconductor device,

wherein a second terminal of the first transistor is electrically connected to a second output terminal of the semiconductor device.

15. A semiconductor device comprising:

an operational amplifier;

a first transistor; and

a second transistor over the first transistor with an insulating film interposed therebetween,

wherein an output terminal of the operational amplifier is electrically connected to a gate of the first transistor,

wherein a first terminal of the first transistor is electrically connected to an output terminal of the semiconductor device,

wherein a first terminal of the second transistor is electrically connected to the operational amplifier,

wherein the first transistor comprises a first oxide semiconductor film comprising a channel formation region,

wherein the second transistor comprises a second oxide semiconductor film comprising a channel formation region,

wherein the first oxide semiconductor film comprises at least one of In and Zn,

wherein the second oxide semiconductor film comprises In, M, and Zn, and

wherein M is at least one of Ga, Y, Zr, La, Ce, and Nd.

16. The semiconductor device according to claim 15 ,

wherein the operational amplifier is configured to generate a control signal supplied to the gate of the first transistor,

wherein the first transistor is configured to supply a voltage from the output terminal of the semiconductor device, and

wherein the second transistor is configured to hold a bias potential supplied to the operational amplifier.

17. The semiconductor device according to claim 16 , further comprising a capacitor,

wherein the capacitor is configured to hold a charge corresponding to the bias potential.

18. The semiconductor device according to claim 15 , further comprising a coil between the first terminal of the first transistor and the output terminal of the semiconductor device and a diode between the first terminal of the first transistor and a second output terminal of the semiconductor device,

wherein a second terminal of the first transistor is electrically connected to a power source.

19. The semiconductor device according to claim 15 , further comprising a coil between the first terminal of the first transistor and a power source and a diode between the first terminal of the second transistor and the output terminal of the semiconductor device,

wherein a second terminal of the first transistor is electrically connected to a second output terminal of the semiconductor device.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 8, 2016
From: KOYAMA, JUN; TAKAHASHI, KEI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 039372/0575 →
Priority Claims (1)
JP 2013-159086 · Jul 31, 2013 · national
Continuity (2)
Continuation 14445370 · Jul 29, 2014
Related Publication 20160285369A1 · Sep 29, 2016
Cited By (1)
US 12,389,650