Method for wafer dicing
The semiconductor die includes a base body, protruding portions and bonding pads. The base body has sidewalls. The protruding portions are laterally protruding from the sidewalls respectively. The bonding pads are disposed on the protruding portions respectively. The wafer dicing method includes following operations. Chips are formed on a semiconductor wafer. Bonding pads are formed at a border line between every two of the adjacent chips. A scribe line is formed and disposed along the bonding pads. A photolithographic pattern is formed on a top layer of the semiconductor wafer to expose the scribe line. The scribe line is etched to a depth in the semiconductor wafer substantially below the top layer to form an etched pattern. A back surface of the semiconductor wafer is thinned until the etched pattern in the semiconductor wafer is exposed.
1. A wafer dicing method, comprising:
forming a plurality of chips on a semiconductor wafer;
forming a plurality of bonding pads at a border line between every two of the adjacent chips;
forming a scribe line disposed along the bonding pads;
forming a photolithographic pattern on a top layer of the semiconductor wafer to expose the scribe line;
etching the scribe line to a depth in the semiconductor wafer substantially below the top layer to form an etched pattern; and
thinning a back surface of the semiconductor wafer until the etched pattern in the semiconductor wafer is exposed.
2. The wafer dicing method of claim 1 , wherein the operation of providing the semiconductor wafer further comprises providing the semiconductor wafer formed from a material including gallium arsenide (GaAs), gallium arsenide-phosphide (GaAsP), indium phosphide (InP), gallium phosphide (GaP), gallium aluminum arsenic (GaAlAs), indium gallium phosphide (InGaP), gallium nitride (GaN), Indium gallium nitride (InGaN), GaN/InGaN on sapphire, silicon (Si), germanium (Ge), silicon germanium (SiGe) or a printed circuit board (PCB).
3. The wafer dicing method of claim 1 , wherein forming the scribe line disposed along the bonding pads further comprises forming the scribe line meandering along each of the bonding pads.
4. The wafer dicing method of claim 1 , wherein forming the scribe line disposed along the bonding pads further comprises forming the scribe line passing through each of the bonding pads.
5. The wafer dicing method of claim 1 , wherein after etching the scribe line to the depth in the semiconductor wafer substantially below the top layer, further comprising mounting a tape on the top layer of the semiconductor wafer, thereby exposing the back surface of the semiconductor wafer.
6. The wafer dicing method of claim 1 , wherein etching the scribe line to the depth in the semiconductor wafer substantially below the top layer further comprises etching the scribe line to the depth in the semiconductor wafer substantially below the top layer using a plasma etching process.
7. The wafer dicing method of claim 1 , wherein etching the scribe line to the depth in the semiconductor wafer substantially below the top layer further comprises etching the scribe line to the depth in a range substantially from 2 μm to 75 μm.
8. The wafer dicing method of claim 1 , wherein etching the scribe line to the depth in the semiconductor wafer substantially below the top layer further comprises etching the scribe line to a width in a range substantially from 5 μm to 50 μm.
9. The wafer dicing method of claim 1 , wherein forming the bonding pads at the border line between every two of the adjacent chips forms each of the bonding pads with a width of substantially 90 μm.
10. The wafer dicing method of claim 1 , wherein forming the bonding pads at the border line between every two of the adjacent chips forms the bonding pads that are co-linear.
11. The wafer dicing method of claim 1 , wherein forming the scribe line disposed along the bonding pads forms the scribe line that meanders along each of the bonding pads.
12. The wafer dicing method of claim 1 , wherein forming the scribe line disposed along the bonding pads forms the scribe line passing through each of the bonding pads.
13. A wafer dicing method, comprising:
forming a plurality of chips on a semiconductor wafer, wherein each of the chips has a sidewall and a plurality of protruding portions laterally protruding from the sidewall;
forming a plurality of bonding pads on the protruding portions at a border line between every two of the adjacent chips; and
forming a scribe line disposed along the bonding pads.
14. The wafer dicing method of claim 13 , further comprising:
forming a photolithographic pattern on a top layer of the semiconductor wafer to expose the scribe line;
etching the scribe line to a depth in the semiconductor wafer substantially below the top layer to form an etched pattern; and
thinning a back surface of the semiconductor wafer until the etched pattern in the semiconductor wafer is exposed.
15. The wafer dicing method of claim 14 , wherein etching the scribe line to the depth in the semiconductor wafer substantially below the top layer further comprises etching the scribe line to a width in a range substantially from 5 μm to 50 μm.
16. The wafer dicing method of claim 13 , wherein forming the scribe line disposed along the bonding pads further comprises forming the scribe line meandering along each of the bonding pads.
17. The wafer dicing method of claim 13 , wherein forming the scribe line disposed along the bonding pads further comprises forming the scribe line passing through each of the bonding pads.
18. A wafer dicing method, comprising:
forming a plurality of chips on a semiconductor wafer;
forming a plurality of bonding pads at a border line between every two of the adjacent chips; and
forming a scribe line disposed along the bonding pads, wherein the scribe line has a width in a range from substantially 5 μm to substantially 50 μm.
19. The wafer dicing method of claim 18 , wherein forming the scribe line disposed along the bonding pads comprises:
forming a photolithographic pattern on a top layer of the semiconductor wafer to expose the scribe line; and
etching the scribe line to a depth in the semiconductor wafer substantially below the top layer to form an etched pattern.
20. The wafer dicing method of claim 19 , further comprising:
thinning a back surface of the semiconductor wafer until the etched pattern in the semiconductor wafer is exposed.