First read countermeasures in memory
Techniques are provided for improving the accuracy of read operations of memory cells, where the threshold voltage of the memory cells can shift depending on the coupled up state of the word lines. In one approach, for a read operation, a representative word line voltage in a block is detected and a corresponding set of read voltages is selected. In another approach, a pre-read voltage pulse is applied to a selected word line in response to a read command, just prior to reading the selected cells. In another approach, a voltage pulse is periodically applied to each word line in a block to provide the word lines in a coupled up state. In another approach, a soft erase is performed after a read operation to prevent coupling up of the word lines.
1. An apparatus, comprising:
a block of memory cells, the memory cells are connected to a set of word lines;
a voltage detector connected to one or more word lines of the set of word lines, the voltage detector is configured to perform an evaluation of a voltage of the one or more word lines; and
a control circuit in communication with the voltage detector, the control circuit is configured to determine a read voltage for reading selected memory cells in the block based on the evaluation, the selected memory cells connected to a word line which is not connected to the voltage detector.
2. The apparatus of claim 1 , wherein:
the voltage detector is configured to receive one or more reference voltages and compare the voltage of the one or more word lines to each of the one or more reference voltages; and
the control circuit is configured to select the read voltage from among a plurality of read voltages based on the compare of the voltage of the one or more word lines to each of the one or more reference voltages.
3. The apparatus of claim 1 , wherein:
the control circuit is configured to cause the voltage detector to perform the evaluation in response to receiving a read command involving the block.
4. A method, comprising:
in response to a read command involving selected memory cells of a block, determining that a condition is met to apply a pre-read voltage pulse to the selected memory cells prior to reading the selected memory cells, the determining that the condition is met comprises evaluating a voltage of one or more word lines connected to memory cells of the block and determining that the voltage is below a threshold; and
when the condition is met, applying the pre-read voltage pulse to the selected memory cells prior to reading the selected memory cells.
5. The method of claim 4 , wherein:
the determining that the condition is met comprises determining that an elapsed time since a last sensing of the block exceeds a threshold.
6. The method of claim 5 , further comprising:
setting the duration and/or magnitude of the pre-read voltage pulse based on the elapsed time.
7. The method of claim 4 , wherein:
the condition is met when a previous read of the selected memory cells resulted in one or more uncorrectable errors.
8. The method of claim 4 , further comprising:
setting a duration and/or magnitude of the pre-read voltage pulse based on the evaluating.
9. The method of claim 4 , further comprising:
increasing a duration of the pre-read voltage pulse as the voltage of one or more word lines decreases.
10. The method of claim 4 , further comprising:
increasing a magnitude of the pre-read voltage pulse as the voltage of one or more word lines decreases.
11. The method of claim 5 , further comprising:
increasing a duration of the pre-read voltage pulse as the elapsed time increases.
12. The method of claim 5 , further comprising:
increasing a magnitude of the pre-read voltage pulse as the elapsed time increases.
13. The method of claim 4 , further comprising:
increasing a duration of the pre-read voltage pulse as a temperature decreases.
14. The method of claim 4 , further comprising:
increasing a magnitude of the pre-read voltage pulse as a temperature decreases.
15. An apparatus, comprising:
a block of memory cells, the memory cells are connected to a set of word lines;
a voltage detector connected to one or more word lines of the set of word lines, the voltage detector is configured to perform an evaluation of a voltage of the one or more word lines; and
a control circuit in communication with the voltage detector, the control circuit is configured to determine a read voltage for reading selected memory cells in the block based on the evaluation, the control circuit is configured to cause the voltage detector to perform the evaluation according to a periodic polling of the block.
16. An apparatus, comprising:
a block of memory cells, the memory cells are connected to a set of word lines;
a voltage detector connected to one or more word lines of the set of word lines, the voltage detector is configured to perform an evaluation of a voltage of the one or more word lines; and
a control circuit in communication with the voltage detector, the control circuit is configured to determine a read voltage for reading selected memory cells in the block based on the evaluation, the control circuit is configured to cause the voltage detector to perform the evaluation in response to a determination that a previous read of memory cells in the block resulted in one or more uncorrectable errors.