IP Library Granted Patent US 10,043,809
Granted Patent B1
US 10,043,809 · App. 15/632,394 · Granted Aug 7, 2018

Semiconductor device and method for fabricating the same

Inventors: Yi-Ching Chang (Pingtung County, TW); Feng-Yi Chang (Tainan, TW); Fu-Che Lee (Taichung, TW); Chieh-Te Chen (Kaohsiung, TW)
Assignees: UNITED MICROELECTRONICS CORP.; Fujian Jinhua Integrated Circuit Co., Ltd.
H01L27/10885H01L21/7682H01L27/10888H01L27/10897
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Quick Facts
Patent No.
US 10,043,809
App. No.
15/632,394
Granted
Aug 7, 2018
Kind
B1
Abstract

A method for fabricating semiconductor device includes the steps of: providing a substrate having a cell region and a peripheral region; forming a bit line structure on the cell region and a gate structure on the peripheral region; forming an interlayer dielectric (ILD) layer around the bit line structure and the gate structure; forming a conductive layer on the bit line structure; performing a first photo-etching process to remove part of the conductive layer for forming storage contacts adjacent two sides of the bit line structure and contact plugs adjacent to two sides of the gate structure; forming a first cap layer on the cell region and the peripheral region to cover the bit line structure and the gate structure; and performing a second photo-etching process to remove part of the first cap layer on the cell region.

Claims (16)

1. A semiconductor device, comprising:

a substrate having a cell region and a peripheral region;

a bit line structure on the cell region;

air gaps adjacent to two sides of the bit line structure;

a first cap layer on the bit line structure and the air gaps, wherein the first cap layer is U-shaped; and

a second cap layer on the first cap layer, wherein the second cap layer and the first cap layer comprise a dielectric material.

2. The semiconductor device of claim 1 , further comprising storage contacts adjacent to two sides of the bit line structure.

3. The semiconductor device of claim 2 , wherein a top surface of the storage contacts is even with the top surfaces of the first cap layer and the second cap layer.

4. The semiconductor device of claim 2 , wherein the storage contacts comprise tungsten.

5. The semiconductor device of claim 1 , further comprising:

a gate structure on the peripheral region;

an interlayer dielectric (ILD) layer on the gate structure; and

contact plugs adjacent to two sides of the gate structure and within the ILD layer.

6. The semiconductor device of claim 1 , wherein the first cap layer and the second cap layer comprise different material.

7. The semiconductor device of claim 1 , wherein the first cap layer comprises silicon nitride.

8. The semiconductor device of claim 1 , wherein the second cap layer comprises silicon carbon nitride (SiCN).

Assignments (2)
CHANGE OF ADDRESS OF SECOND ASSIGNEE Recorded Jun 3, 2019
From: FUJIAN JINHUA INTEGRATED CIRCUIT CO., LTD.
To: FUJIAN JINHUA INTEGRATED CIRCUIT CO., LTD.
Reel/Frame 049342/0633 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 26, 2017
From: CHANG, YI-CHING; CHANG, FENG-YI; LEE, FU-CHE; CHEN, CHIEH-TE
To: UNITED MICROELECTRONICS CORP.; FUJIAN JINHUA INTEGRATED CIRCUIT CO., LTD.
Reel/Frame 042808/0082 →
Priority Claims (1)
CN 2017 1 0347829 · May 17, 2017 · national
Cited By (5)
US 12,237,215 US 12,279,427 US 12,438,040 US 12,512,374 US 12,713,576