IP Library › Granted Patent US 10,056,475
Granted Patent B2
US 10,056,475 · App. 15/290,359 · Granted Aug 21, 2018

Semiconductor device and method for manufacturing the same

Inventors: Shunpei Yamazaki (Setagaya, JP); Daisuke Matsubayashi (Atsugi, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L29/66969H01L21/02554H01L21/441H01L29/7869H01L29/78648
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,056,475
App. No.
15/290,359
Granted
Aug 21, 2018
Kind
B2
Abstract

A first source electrode is formed in contact with a semiconductor layer; a first drain electrode is formed in contact with the semiconductor layer; a second source electrode which extends beyond an end portion of the first source electrode to be in contact with the semiconductor layer is formed; a second drain electrode which extends beyond an end portion of the first drain electrode to be in contact with the semiconductor layer is formed; a first sidewall is formed in contact with a side surface of the second source electrode and the semiconductor layer; a second sidewall is formed in contact with a side surface of the second drain electrode and the semiconductor layer; and a gate electrode is formed to overlap the first sidewall, the second sidewall, and the semiconductor layer with a gate insulating layer provided therebetween.

Claims (27)

1. A method for manufacturing a semiconductor device including a gate electrode, a gate insulating layer, a semiconductor layer, a first source electrode, a first drain electrode, a second source electrode, a second drain electrode and sidewalls, the method comprising the steps of:

forming the first source electrode and the first drain electrode in direct contact with the semiconductor layer, the first source electrode overlapping a first part of the semiconductor layer, and the first drain electrode overlapping a second part of the semiconductor layer;

forming the second source electrode over the first source electrode, the second source electrode extending beyond an end portion of the first source electrode to be in direct contact with the semiconductor layer in a region being overlapped by the gate electrode,

forming the second drain electrode over the first drain electrode, the second drain electrode extending beyond an end portion of the first drain electrode to be in direct contact with the semiconductor layer,

forming the sidewalls by introducing oxygen to end portions of the second source electrode and the second drain electrode;

forming the gate insulating layer so that the gate insulating layer overlaps the semiconductor layer and the sidewalls; and

forming the gate electrode so that the gate electrode overlaps the gate insulating layer.

2. The semiconductor device according to claim 1 , wherein the semiconductor layer includes an oxide semiconductor.

3. The semiconductor device according to claim 1 , wherein the semiconductor layer is a stack including an oxide semiconductor layer and an oxide layer.

4. A method for manufacturing a semiconductor device including a gate electrode, a gate insulating layer, a semiconductor layer, a first source electrode, a first drain electrode, a second source electrode, a second drain electrode and sidewalls, the method comprising the steps of:

forming the first source electrode and the first drain electrode in direct contact with the semiconductor layer, the first source electrode overlapping a first part of the semiconductor layer, and the first drain electrode overlapping a second part of the semiconductor layer;

forming the second source electrode over the first source electrode, the second source electrode extending beyond an end portion of the first source electrode to be in direct contact with the semiconductor layer in a region being overlapped by the gate electrode,

forming the second drain electrode over the first drain electrode, the second drain electrode extending beyond an end portion of the first drain electrode to be in direct contact with the semiconductor layer,

forming the sidewalls by introducing oxygen to end portions of the second source electrode and the second drain electrode, the side walls being in direct contact with the semiconductor layer;

forming the gate insulating layer so that the gate insulating layer overlaps the semiconductor layer and the sidewalls; and

forming the gate electrode so that the gate electrode overlaps the gate insulating layer.

5. The semiconductor device according to claim 4 , wherein the semiconductor layer includes an oxide semiconductor.

6. The semiconductor device according to claim 4 , wherein the semiconductor layer is a stack including an oxide semiconductor layer and an oxide layer.

7. A method for manufacturing a semiconductor device including a gate electrode, a gate insulating layer, a semiconductor layer, a first source electrode, a first drain electrode, a second source electrode, a second drain electrode and sidewalls, the method comprising the steps of:

forming the first source electrode and the first drain electrode in direct contact with the semiconductor layer, the first source electrode overlapping a first part of the semiconductor layer, and the first drain electrode overlapping a second part of the semiconductor layer;

forming the second source electrode over the first source electrode, the second source electrode extending beyond an end portion of the first source electrode to be in direct contact with the semiconductor layer in a region being overlapped by the gate electrode,

forming the second drain electrode over the first drain electrode, the second drain electrode extending beyond an end portion of the first drain electrode to be in direct contact with the semiconductor layer,

forming the sidewalls by introducing oxygen to end portions of the second source electrode and the second drain electrode, the sidewalls including a first sidewall that is overlapped by the gate electrode and a second sidewall that is not overlapped by the gate electrode;

forming the gate insulating layer so that the gate insulating layer overlaps the semiconductor layer and the sidewalls; and

forming the gate electrode so that the gate electrode overlaps the gate insulating layer.

8. The semiconductor device according to claim 7 , wherein the semiconductor layer includes an oxide semiconductor.

9. The semiconductor device according to claim 7 , wherein the semiconductor layer is a stack including an oxide semiconductor layer and an oxide layer.

Priority Claims (1)
JP 2013-064522 · Mar 26, 2013 · national
Continuity (2)
Division 14220544 · Mar 20, 2014
Related Publication 20170033204A1 · Feb 2, 2017
Cited By (1)
US 12,389,636