IP Library › Granted Patent US 10,090,296
Granted Patent B2
US 10,090,296 · App. 15/861,497 · Granted Oct 2, 2018

Semiconductor device, manufacturing method thereof, and electronic apparatus

Inventor: Takushi Shigetoshi (Kanagawa, JP)
Assignee: Sony Corporation
H01L27/0694H01L21/76898H01L21/8221H01L21/8232H01L23/481H01L23/528H01L23/5226H01L23/5283H01L23/538H01L23/5383H01L27/0688H01L27/11512H01L27/11514H01L27/11551H01L27/11578H01L27/14634H01L27/14636H01L27/14678H01L27/14641H01L29/0623H01L2224/08145H01L2224/24147H01L2224/80896H01L2224/8203H01L2224/92H01L2924/0002
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Quick Facts
Patent No.
US 10,090,296
App. No.
15/861,497
Granted
Oct 2, 2018
Kind
B2
Abstract

A semiconductor device includes a wiring layer that includes at least one low-dielectric rate interlayer insulating film layer; a guard ring that is formed by placing in series a wire and a via so as to be in contact with a through electrode, in a portion in which the through electrode passing through the wiring layer is formed; and the through electrode that is formed by being buried inside the guard ring.

Claims (33)

1. A method of manufacturing a device, the method comprising:

forming a first plurality of wiring layers at a side of a first substrate such that at least one low-dielectric rate interlayer insulating film layer is between each wire of a respective wiring layer and a diffusion barrier film, wherein the diffusion barrier film contacts each wire of the first plurality of wiring layers;

forming a guard ring that includes a wire from each of the first plurality of wiring layers and a plurality of vias arranged in a stacked structure, wherein each wire from each of the first plurality of wiring layers is electrically connected to a respective via of the plurality of vias;

forming a second plurality of wiring layers and a plurality of pads at a side of a second substrate such that at least one interlayer insulating film layer is between each wire of a respective wiring layer and a diffusion barrier film, wherein each wire of the second plurality of wiring layers is disposed on the diffusion barrier film and at least one pad is electrically connected to a wire of a wiring layer of the second plurality of wiring layers;

bonding the first substrate to the second substrate; and

forming a through-electrode inside the guard ring such that the guard ring is electrically connected to the at least one pad, wherein at least one via of the plurality of vias includes a metal material disposed between the diffusion barrier film and the through-electrode.

2. The method of manufacturing the device according to claim 1 , wherein the first substrate is electrically connected to the second substrate through the through-electrode.

3. The method of manufacturing the device according to claim 2 , further comprising:

stacking a semiconductor substrate including a contact image sensor (CIS) on the first substrate.

4. The method of manufacturing the device according to claim 2 , wherein the first substrate includes a signal processing circuit.

5. The method of manufacturing the device according to claim 2 , wherein the first substrate includes a contact image sensor (CIS).

6. The method of manufacturing the device according to claim 2 , further comprising:

stacking another substrate that includes a signal processing circuit on the device.

7. The method of manufacturing the device according to claim 2 , further comprising:

stacking a third substrate that includes a storage medium circuit on the device.

8. The method of manufacturing the device according to claim 1 , wherein the first substrate is a first semiconductor substrate and the second substrate is a second semiconductor substrate.

9. A method of manufacturing an electronic apparatus, the method comprising:

forming a first plurality of wiring layers at a side of a first substrate such that at least one low-dielectric rate interlayer insulating film layer is between each wire of a respective wiring layer and a diffusion barrier film, wherein the diffusion barrier film contacts each wire of the first plurality of wiring layers;

forming a guard ring that includes a wire from each of the first plurality of wiring layers and a plurality of vias arranged in a stacked structure, wherein each wire from each of the first plurality of wiring layers is electrically connected to a respective via of the plurality of vias;

forming a second plurality of wiring layers and a plurality of pads at a side of a second substrate such that at least one interlayer insulating film layer is between each wire of a respective wiring layer and a diffusion barrier film, wherein each wire of the second plurality of wiring layers is disposed on the diffusion barrier film and at least one pad is electrically connected to a wire of a wiring layer of the second plurality of wiring layers;

bonding the first substrate to the second substrate;

forming a through-electrode inside the guard ring such that the guard ring is electrically connected to the at least one pad, wherein at least one via of the plurality of vias includes a metal material disposed between the diffusion barrier film and the through-electrode; and

providing a lens configured to direct light to a light-incident surface of the first substrate or the second substrate.

10. The method of manufacturing the electronic apparatus according to claim 9 , wherein the first substrate is electrically connected to the second substrate through the through-electrode.

11. The method of manufacturing the electronic apparatus according to claim 10 , further comprising:

stacking a semiconductor substrate including a contact image sensor (CIS) on the first substrate.

12. The method of manufacturing the electronic apparatus according to claim 10 , wherein the first substrate includes a signal processing circuit.

13. The method of manufacturing the electronic apparatus according to claim 10 , wherein the first substrate includes a contact image sensor (CIS).

14. The method of manufacturing the electronic apparatus according to claim 10 , further comprising:

stacking another substrate that includes a signal processing circuit on one of the first or second substrates.

15. The method of manufacturing the electronic apparatus according to claim 10 , further comprising:

stacking a third substrate that includes a storage medium circuit on one of the first or second substrates.

16. The method of manufacturing the electronic apparatus according to claim 9 , wherein the first substrate is a first semiconductor substrate and the second substrate is a second semiconductor substrate.

Priority Claims (1)
JP 2013-211642 · Oct 9, 2013 · national
Continuity (2)
Continuation 14505006 · Oct 2, 2014
Related Publication 20180130743A1 · May 10, 2018
Cited By (1)
US 12,199,122