Resistive random access memory structure and manufacturing method thereof

1. A resistive random access memory (RRAM) structure, comprising:

a substrate;

RRAM cells adjacent to each other and disposed on the substrate; and

protection layers disposed respectively on sidewalls of the RRAM cells without covering top surfaces of the RRAM cells, wherein each of the protection layers comprises:

a sidewall portion disposed on each of the sidewalls of each of the RRAM cells; and

an extension portion connected to a lower portion of the sidewall portion, wherein

an upper portion of the extension portion is lower than an upper portion of the sidewall portion,

the extension portion is connected between the sidewall portions in a region between the RRAM cells,

a top surface of the sidewall portion is higher than the top surfaces of the RRAM cells, and

a bottom surface of the sidewall portion is lower than bottom surfaces of the RRAM cells.

2. The RRAM structure of claim 1 , wherein each of the RRAM cells comprises:

a bottom electrode disposed on the substrate;

a top electrode disposed on the bottom electrode; and

a variable resistance layer disposed between the top electrode and the bottom electrode.

3. The RRAM structure of claim 2 , wherein the top electrode comprises a single-layer structure.

4. The RRAM structure of claim 2 , wherein each of the RRAM cells further comprises:

a hard mask layer disposed on the top electrode.

5. The RRAM structure of claim 2 , further comprising:

a first interconnect structure electrically connected to the bottom electrode; and

a second interconnect structure electrically connected to the top electrode.

6. The RRAM structure of claim 5 , wherein the first interconnect structure and the second interconnect structure respectively comprise a via, a trench or a combination thereof.

7. The RRAM structure of claim 1 , wherein the sidewall portions are separated from each other in the region between the RRAM cells.

8. The RRAM structure of claim 1 , wherein a ratio of a width of each of the sidewall portions to a distance between the RRAM cells is more than or equal to 0.2 and less than 0.5.

9. The RRAM structure of claim 1 , wherein a shape formed by the protection layers in the region between the RRAM cells comprises an U-shape.

10. A method of manufacturing a resistive random access memory (RRAM) structure, comprising:

providing a substrate;

forming RRAM cells on the substrate, wherein the RRAM cells are adjacent to each other; and

respectively forming protection layers on sidewalls of the RRAM cells without covering top surfaces of the RRAM cells, wherein each of the protection layers comprises:

a sidewall portion disposed on each of the sidewalls of each of the RRAM cells; and

an extension portion connected to a lower portion of the sidewall portion, wherein

an upper portion of the extension portion is lower than an upper portion of the sidewall portion,

the extension portion is connected between the sidewall portions in a region between the RRAM cells,

a top surface of the sidewall portion is higher than the top surfaces of the RRAM cells, and

a bottom surface of the sidewall portion is lower than bottom surfaces of the RRAM cells.

11. The method of manufacturing the RRAM structure of claim 10 , wherein a method of forming the protection layers comprises:

conformally forming a protection material layer on the RRAM cells;

forming a photoresist layer, wherein the photoresist layer at least covers the protection material layer located on the sidewalls of the RRAM cells; and

performing a removing process on the photoresist layer and the protection material layer until the top surfaces of the RRAM cells are exposed, wherein a removing rate of the photoresist layer is less than or equal to a removing rate of the protection material layer during the removing process.

12. The method of manufacturing the RRAM structure of claim 11 , wherein a height of the photoresist layer relative to the substrate is higher than or equal to a height of the protection material layer relative to the substrate.

13. The method of manufacturing the RRAM structure of claim 11 , wherein the removing process comprises an etching back process.

14. The method of manufacturing the RRAM structure of claim 10 , wherein each of the RRAM cells comprises:

a bottom electrode disposed on the substrate;

a top electrode disposed on the bottom electrode; and

a variable resistance layer disposed between the top electrode and the bottom electrode.

15. The method of manufacturing the RRAM structure of claim 14 , wherein each of the RRAM cells further comprises:

a hard mask layer disposed on the top electrode.

16. The method of manufacturing the RRAM structure of claim 14 , further comprising:

a first interconnect structure electrically connected to the bottom electrode; and

a second interconnect structure electrically connected to the top electrode.

17. The method of manufacturing the RRAM structure of claim 10 , wherein the sidewall portions are separated from each other in the region between the RRAM cells.

18. The method of manufacturing the RRAM structure of claim 10 , wherein a ratio of a width of each of the sidewall portions to a distance between the RRAM cells is more than or equal to 0.2 and less than 0.5.

19. The method of manufacturing the RRAM structure of claim 10 , wherein a shape formed by the protection layers in the region between the RRAM cells comprises an U-shape.

20. The RRAM structure of claim 2 , wherein the top electrode comprises a multi-layer structure.