Granted Patent B2

US 12,284,922 · App. 17/679,418 · Granted Apr 22, 2025

Inventors: Hiroyuki Miyazoe (White Plains, NY); Gloria W. Y. Fraczak (Bayside, NY); Kumar R. Virwani (Santa Clara, CA); Takashi Ando (Eastchester, NY)

Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION

H10N70/011H10B63/24H10N70/24H10N70/826

Abstract

Claims (13)

1. A method comprising:

forming a bottom electrode layer over a substrate;

forming a mixed ionic-electronic conductor (MIEC) layer including copper, germanium, and sulfur in direct contact with the bottom electrode layer

forming a middle electrode layer over the MIEC layer;

forming a metal oxide layer over the middle electrode layer;

forming a first top electrode layer and a second top electrode layer over the metal oxide layer, the first top electrode layer, the second top electrode layer, and the metal oxide layer forming a stack; and forming sidewall spacers on sidewalls of the stack such that the sidewall spacers are positioned directly in contact with a surface of the middle electrode layer, and, in their entirety, over the surface of the middle electrode layer.

2. The method of claim 1 , wherein the stack includes a resistive random access memory (ReRAM) device stack.

3. The method of claim 2 , wherein the first top electrode layer includes titanium nitride and the second top electrode layer includes tantalum nitride.

4. The method of claim 2 , wherein the sidewall spacers are formed adjacent to the ReRAM device stack.

5. The method of claim 1 , wherein the MIEC layer has a width equal to a width of the middle electrode layer.

6. The method of claim 1 , wherein the MIEC layer directly contacts a bottom surface of the middle electrode layer.

7. The method of claim 1 , wherein the MIEC layer directly contacts a top surface of the bottom electrode layer.

8. The method of claim 1 , wherein the MIEC layer has a width greater than a width of the bottom electrode layer.

Assignments (1)

Continuity (2)

References Cited (68)