Semiconductor device, method and tool of manufacture
A semiconductor manufacturing tool and process to form semiconductor devices is provided. An edge ring of the semiconductor manufacturing tool comprises a high electron mobility material in order to extend an electrical field and sheath such that curvature from the sheath is moved away from a semiconductor wafer so that an impact from the curvature is reduced or eliminated during an etching process.
1. A method of manufacturing a semiconductor device, the method comprising:
providing a first chuck, the first chuck comprising a first electrode to generate a sheath over the first chuck; extending the sheath by placing a first edge ring adjacent to the first chuck, wherein the first edge ring is formed of a high electron mobility material and is electrically isolated from the first chuck;
placing a semiconductor substrate within the first edge ring; and
etching a gate electrode material over semiconductor fins located over the semiconductor substrate to form a gate electrode, wherein the gate electrode after the etching the gate electrode comprises:
a bottom portion with a bottom critical dimension;
a middle portion with a middle critical dimension, wherein the middle critical dimension is between about 90% and about 110% of the bottom critical dimension; and
a top portion with a top critical dimension, wherein the top critical dimension is between 80% and 110% of the bottom critical dimension.
2. The method of claim 1 , wherein the high electron mobility material comprises silicon doped with nitrogen, silicon doped with carbon, silicon doped with fluorine, or silicon doped with oxygen.
3. The method of claim 1 , further comprising:
attaching the semiconductor substrate to the first chuck.
4. The method of claim 3 , wherein the attaching the semiconductor substrate to the first chuck further comprises applying an electrostatic force to the semiconductor substrate.
5. A method of manufacturing a semiconductor device, the method comprising:
placing a first edge ring adjacent to a first electrostatic chuck;
attaching a semiconductor wafer onto the first electrostatic chuck; and
generating a sheath over the semiconductor wafer, the sheath comprising a first region and a second region, wherein ions that enter the first region of the sheath are accelerated at an angle perpendicular to the semiconductor wafer and wherein ions that enter the second region of the sheath are accelerated at an angle that is not perpendicular to the semiconductor wafer, wherein the ions that enter the second region impact the first edge ring and do not impact the semiconductor wafer, wherein the semiconductor wafer comprises a semiconductor substrate, semiconductor fins over the semiconductor substrate, a gate electrode material over the semiconductor fins, a first hardmask over the gate electrode material, and a second hardmask over the first hardmask.
6. The method of claim 5 , wherein after the generating the sheath the second hardmask has a first profile angle along a first sidewall of less than about 75°.
7. The method of claim 6 , wherein after the generating the sheath the second hardmask has a second profile angle along a second sidewall of less than about 75°, wherein the second sidewall is opposite the first sidewall.
8. The method of claim 5 , wherein after the generating the sheath an opening is formed through the gate electrode material, wherein the opening has an aspect ratio of greater than 3.64%.
9. The method of claim 5 , wherein after the generating the sheath a plurality of gate electrodes are formed from the gate electrode material, the gate electrodes having a pitch of about 66 nm.
10. The method of claim 5 , wherein after the generating the sheath a plurality of gate electrodes are formed from the gate electrode material, the gate electrode having a gate profile angle of greater than 90°.
11. A method of manufacturing a semiconductor device, the method comprising:
placing a semiconductor wafer into a first tool, the first tool comprising:
an electrostatic chuck;
a base ring adjacent to the electrostatic chuck; and
an edge ring extending over both the electrostatic chuck and the base ring and electrically isolated from the electrostatic chuck, wherein the edge ring comprises silicon doped with nitrogen, silicon doped with carbon, silicon doped with fluorine, or silicon doped with oxygen, and wherein the edge ring comprises a horizontal support section and a vertical support section extending above a portion of the horizontal support section; and
generating a sheath over the semiconductor wafer within the first tool, the sheath accelerating ions at a first angle and at a second angle different from the first angle, wherein the first angle directs ions towards the semiconductor wafer and the second angle directs ions towards the edge ring, wherein the semiconductor wafer comprises a semiconductor substrate and semiconductor fins over the semiconductor substrate.
12. The method of claim 11 , wherein the vertical support section has a first width and the horizontal support section has a second width larger than the first width.
13. The method of claim 12 , wherein the first width is greater than about 24 mm.
14. The method of claim 11 , wherein the edge ring comprises silicon doped with nitrogen or silicon doped with oxygen.
15. The method of claim 11 , wherein the edge ring comprises silicon doped with fluorine or silicon doped with carbon.
16. The method of claim 1 , wherein the first electrode is at least partially within the first chuck, the first electrode and the first chuck are formed of different materials, and at least a portion of the first electrode and at least a portion of the first chuck are on a same side of a semiconductor substrate.
17. The method of claim 1 , wherein a bottom surface of the first edge ring is above a topmost surface of a base ring below the first edge ring.