IP Library › Granted Patent US 12,727,432
Granted Patent B2
US 12,727,432 · App. 17/520,301 · Granted Sep 1, 2026

Semiconductor device, method and tool of manufacture

Inventors: Shih-Yu Chang (Yunlin County, TW); Chien-Han Chen (Nantou County, TW); Chien-Chih Chiu (Xinying City, TW); Chi-Che Tseng (Taoyuan City, TW)
Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
H10P72/722H10P72/0418H10P72/7614H10D84/0193H10D84/038H10P50/242
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Quick Facts
Patent No.
US 12,727,432
App. No.
17/520,301
Granted
Sep 1, 2026
Kind
B2
Abstract

Semiconductor devices, methods of manufacturing the semiconductor device and tools are disclosed herein. Some methods include providing an electrostatic chuck and placing an edge ring adjacent to the electrostatic chuck. The electrostatic chuck includes a first electrode to generate a sheath at a first distance over the electrostatic chuck. The edge ring includes a coil and a second electrode to generate an electric field control to maintain a portion of the sheath over the edge ring in a coplanar orientation with the portion of the sheath over the electrostatic chuck.

Claims (36)

1 . A method comprising:

providing an etching system that includes a chuck, a first electrode, a second electrode, and an edge ring;

placing the edge ring adjacent to the chuck, the edge ring comprising the second electrode different from the first electrode, wherein the edge ring has an “L” shaped cross-section, the second electrode being located within the “L” shaped cross-section of the edge ring;

attaching a semiconductor wafer onto the chuck, the semiconductor wafer comprising elements; and

using the first electrode and the second electrode to etch the elements.

2 . The method of claim 1 , further comprising applying a direct current (DC) voltage to the second electrode.

3 . The method of claim 2 , wherein the edge ring comprises a coil and wherein applying the DC voltage to the second electrode comprises inducing an electric current within the coil.

4 . The method of claim 2 , wherein the DC voltage is based at least in part on a thickness of the edge ring.

5 . The method of claim 2 , wherein a magnitude of the DC voltage is based at least in part on a time in service of the edge ring.

6 . The method of claim 2 , wherein a magnitude of the DC voltage is based at least in part on a shape of the edge ring.

7 . The method of claim 1 , wherein the chuck is an electrostatic chuck, wherein the edge ring is electrically isolated from the chuck, and wherein the method further comprises:

generating a plasma sheath over a first semiconductor wafer; and

applying a first voltage bias to the second electrode of the edge ring.

8 . A method comprising:

providing an etching system including a chuck, a first electrode, a second electrode, and an edge ring;

placing the edge ring adjacent to the chuck, the edge ring comprising silicon nitride and the second electrode different from the first electrode, wherein the edge ring has an “L” shaped cross-section, wherein at least a portion of the second electrode extends into the “L” shaped cross-section of the edge ring;

attaching a semiconductor wafer onto the chuck, the semiconductor wafer comprising elements; and

using the first electrode and the second electrode to perform an etch on the elements.

9 . The method of claim 8 , further comprising applying a direct current (DC) voltage to the second electrode.

10 . The method of claim 9 , wherein the edge ring comprises a coil and wherein applying the DC voltage to the second electrode comprises inducing an electric current within the coil.

11 . The method of claim 9 , wherein the DC voltage is based at least in part on a thickness of the edge ring.

12 . The method of claim 9 , wherein a magnitude of the DC voltage is based at least in part on a time in service of the edge ring.

13 . The method of claim 9 , wherein a magnitude of the DC voltage is based at least in part on a shape of the edge ring.

14 . The method of claim 8 , wherein the chuck is an electrostatic chuck, wherein the edge ring is electrically isolated from the chuck, and wherein the method further comprises:

generating a plasma sheath over a first semiconductor wafer; and

applying a first voltage bias to the second electrode of the edge ring.

15 . A method comprising:

providing an etching system including a chuck, a first electrode, a second electrode, and an edge ring;

placing the edge ring adjacent to the chuck, the edge ring comprising the second electrode different from the first electrode, wherein the edge ring has an “L” shaped cross-section, and wherein the edge ring has a carbon concentration of between about 45%-atomic and about 55%-atomic, the “L” shaped cross-section encircling at least a portion of the second electrode;

attaching a semiconductor wafer onto the chuck, the semiconductor wafer comprising elements; and

using the first electrode and the second electrode to perform an etch on the elements.

16 . The method of claim 15 , further comprising applying a direct current (DC) voltage to the second electrode.

17 . The method of claim 16 , wherein the edge ring comprises a coil and wherein applying the DC voltage to the second electrode comprises inducing an electric current within the coil.

18 . The method of claim 16 , wherein the DC voltage is based at least in part on a thickness of the edge ring.

19 . The method of claim 15 , wherein a magnitude of a DC voltage is based at least in part on a time in service of the edge ring.

20 . The method of claim 15 , wherein a magnitude of a DC voltage is based at least in part on a shape of the edge ring.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 5, 2021
From: CHANG, SHIH-YU; CHEN, CHIEN-HAN; CHIU, CHIEN-CHIH; TSENG, CHI-CHE
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 058035/0272 →
Continuity (2)
Provisional Application 63188216 · May 13, 2021
Related Publication 20220367226A1 · Nov 17, 2022
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