Semiconductor device having air gap and method for manufacturing the same, memory cell having the same and electronic device having the same
A semiconductor device including a semiconductor substrate including a plurality of active regions and a device isolation region for isolating the plurality of active regions; and a buried bit line and a buried gate electrode which are formed in the semiconductor substrate. The device isolation region includes a first device isolation region extending in a first direction and a second device isolation region extending in a second direction crossing with the first direction and having a shield pillar formed therein.
1. A semiconductor device comprising:
a semiconductor substrate having a plurality of active regions and a device isolation region for isolating the plurality of active regions from each other;
a buried bit line and a buried gate electrode which are formed in the semiconductor substrate;
a gate trench having a bottom surface, a first side surface and a second side surface opposite to the first side surface, wherein the buried gate electrode is embedded in the gate trench,
wherein the device isolation region includes a first device isolation region extending in a first direction and a second device isolation region extending in a second direction crossing with the first direction and having a conductive shield pillar,
wherein the conductive shield pillar has a height that overlaps a portion of the buried gate electrode and the buried bit line,
wherein a top surface of the conductive shield pillar being at a higher level than a bottom surface of the buried gate electrode, and
wherein a bottom surface of the conductive shield pillar being at lower level than a bottom surface of the buried bit line.
2. The semiconductor device according to claim 1 , wherein the gate trench comprises:
a first trench extending in the second direction, and
a second trench and a third trench each extending from the first trench and extending in the first direction.
3. The semiconductor device according to claim 2 , wherein the buried gate electrode comprises:
a first electrode buried in the first trench of the gate trench;
a second electrode buried in the second trench of the gate trench; and
a third electrode buried in the third trench of the gate trench.
4. The semiconductor device according to claim 1 , further comprising a bit line trench extending in a third direction crossing with the first and second directions,
wherein the buried bit line is embedded in the bit line trench.
5. The semiconductor device according to claim 1 , wherein the active region comprises a body and a pillar vertically extending over the body,
wherein the pillar comprises:
a first junction region electrically coupled to the buried bit line;
a second junction region vertically positioned from the first junction region; and
a channel region positioned between the first junction region and the second junction region, and overlapping with the buried gate electrode.