IP Library › Granted Patent US 10,185,378
Granted Patent B2
US 10,185,378 · App. 15/284,053 · Granted Jan 22, 2019

Prioritized sequencing of device inrush current

Inventors: Jay Shih Tsao (Kirkland, WA); Robert Allen Shearer (Woodinville, WA); Jonathan Ross (Woodinville, WA)
Assignee: Microsoft Technology Licensing, LLC
G06F1/26G06F1/266G06F1/325G06F1/3237G06F1/3287
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Quick Facts
Patent No.
US 10,185,378
App. No.
15/284,053
Granted
Jan 22, 2019
Kind
B2
Abstract

Input power sequencing implementations for electronic, processing, and computing systems are presented herein. In one example, a method of providing power to operational elements of an electronic system is provided. The method includes maintaining sequencing information for the operational elements that indicates relative priorities and inrush delays for each of the operational elements. Responsive to ones of the operational elements requesting transition to a powered state, the method includes placing at least indications of the ones of the operational elements into a queue, establishing a power sequencing process for servicing the queue based at least on the sequencing information associated with the operational elements in the queue, and initiating the power sequencing process to provide input power to the operational elements in the queue.

Claims (58)

1. A method of providing power to operational elements of an electronic system, the method comprising:

maintaining sequencing information for the operational elements that indicates relative priorities and inrush delays for each of the operational elements;

responsive to one or more of the operational elements requesting transition to a powered state, placing at least indications of the one or more of the operational elements into a queue;

establishing a power sequencing process for servicing the queue with time delays between servicing each of the operational elements in the queue indicated by the inrush delays ordered using at least the relative priorities associated with the operational elements in the queue; and

initiating the power sequencing process to provide input power to the operational elements in the queue.

2. The method of claim 1 , further comprising:

presenting a programming interface to a user;

receiving, over the programming interface, indications of the sequencing information to establish the relative priorities and the inrush delays for one or more of the operational elements; and

storing the indications of the sequencing information in one or more storage media.

3. The method of claim 1 , wherein the sequencing information is configured to establish a target power-on latency among the operational elements requesting transition to the powered state while maintaining associated inrush current for the electronic system below a threshold level.

4. The method of claim 1 , further comprising:

responsive to receiving requests for powered state transitioning for the one or more of the operation elements, retrieving associated sequencing information for the one or more of the operation elements and placing the associated sequencing information into the queue.

5. The method of claim 4 , wherein placing the associated sequencing information into the queue comprises placing the associated sequencing information in the queue according to an order in which the requests for the powered state transitioning are received, and wherein establishing the power sequencing process for servicing the queue comprises establishing an order for servicing the queue according to at least the relative priorities among the operational elements in the queue.

6. The method of claim 1 , further comprising:

establishing the power sequencing process according to at least the relative priorities among the operational elements in the queue; and

de-queuing the operational elements from the queue to execute the power sequencing process.

7. The method of claim 1 , wherein initiating the power sequencing process comprises:

determining the relative priorities among the one or more of the operational elements in the queue; and

directing application of the input power to the one or more of the operational elements in the queue according to ordering among the relative priorities, with an associated timing delay introduced between each subsequent application of the input power corresponding to an inrush delay indicated for each associated operational element.

8. The method of claim 1 , further comprising:

establishing the time delays within the power sequencing process that correspond to the inrush delays indicated for each operational element in the queue.

9. A power sequencing system for operational elements of an electronic system, comprising:

a configuration interface configured to receive sequencing information for the operational elements that indicates relative priorities and inrush delays for each of the operational elements;

a sequencer configured to place at least indications of one or more of the operational elements into a queue responsive to requests from the one or more of the operational elements for transition to a powered state;

the sequencer configured to establish a power sequencing process for servicing the queue according to timing indicated by the inrush delays and ordered using at least the relative priorities associated with the operational elements in the queue; and

the sequencer configured to initiate the power sequencing process to provide input power to the operational elements in the queue.

10. The power sequencing system of claim 9 , further comprising:

a power controller configured to provide the input power to associated one or more of the operational elements in accordance with the power sequencing process.

11. The power sequencing system of claim 9 , comprising:

the configuration interface configured to present a programming interface to a user;

the configuration interface configured to receive, over the programming interface, indications of the sequencing information to establish the relative priorities and the inrush delays for one or more of the operational elements; and

the configuration interface configured to store the indications of the sequencing information in one or more storage media.

12. The power sequencing system of claim 9 , wherein the sequencing information is configured to establish a target power-on latency among the operational elements requesting transition to the powered state while maintaining associated inrush current for the electronic system below a threshold level.

13. The power sequencing system of claim 9 , comprising:

responsive to receiving requests for powered state transitioning for the one or more of the operation elements, the sequencer configured to retrieve associated sequencing information for the one or more of the operation elements and placing the associated sequencing information into the queue.

14. The power sequencing system of claim 13 , comprising:

the sequencer configured to place the associated sequencing information in the queue according to an order in which the requests for the powered state transitioning are received; and

the sequencer configured to establish an order for servicing the queue according to at least the relative priorities among the operational elements in the queue.

15. The power sequencing system of claim 9 , comprising:

the sequencer configured to establish the power sequencing process according to at least the relative priorities among the operational elements in the queue; and

the sequencer configured to de-queue the operational elements from the queue based at least on executing the power sequencing process.

16. The power sequencing system of claim 9 , comprising:

the sequencer configured to initiate the power sequencing process by at least determining the relative priorities among the one or more of the operational elements in the queue, and applying the input power to the one or more of the operational elements in the queue according to ordering among the relative priorities, with an associated delay introduced between each subsequent application of the input power corresponding to an inrush delay indicated for each associated operational element.

17. The power sequencing system of claim 9 , comprising:

the sequencer configured to establish the timing as delays within the power sequencing process that correspond to the inrush delays indicated for each operational element in the queue.

18. A power control apparatus comprising:

one or more computer readable storage media;

a processing system operatively coupled with the one or more computer readable storage media; and

a power sequencing service comprising program instructions stored on the one or more computer readable storage media that, based at least on being read and executed by the processing system, direct the processing system to at least:

maintain sequencing information for operational elements of a system-on-a-chip (SoC) device that indicates relative priorities and inrush delays for each of the operational elements;

responsive to target operational elements requesting transition to a powered state, place at least indications of the target operational elements into a queue;

establish a power sequencing process for servicing the queue according to timing indicated by the inrush delays and ordered using at least the relative priorities associated with the operational elements in the queue; and

direct input power to the operational elements in the queue according to the power sequencing process.

19. The apparatus of claim 18 , comprising further program instructions, based at least in part on execution by the computing system, direct the computing system to at least:

responsive to receiving requests for powered state transitioning for the target operation elements, retrieve associated sequencing information for the target operation elements from one or more storage media, and place the associated sequencing information into the queue.

20. The apparatus of claim 18 , comprising further program instructions, based at least in part on execution by the computing system, direct the computing system to at least:

initiate the power sequencing process by at least determining the relative priorities among the target operational elements in the queue; and

apply the input power to the target operational elements in the queue according to ordering among the relative priorities, with an associated delay introduced between each subsequent application of the input power corresponding to an inrush delay indicated for each associated operational element.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 3, 2016
From: TSAO, JAY SHIH; SHEARER, ROBERT ALLEN; ROSS, JONATHAN
To: MICROSOFT TECHNOLOGY LICENSING, LLC
Reel/Frame 039924/0773 →
Continuity (1)
Related Publication 20180095510A1 · Apr 5, 2018
Cited By (1)
US 12,210,395