Semiconductor device
To provide a semiconductor device in which the on-state current is high and the operation speed is high. The semiconductor device includes a transistor, a first circuit, and a second circuit. The transistor includes a first gate and a second gate. The first gate and the second gate overlap with each other with a semiconductor layer positioned therebetween. The first circuit includes a temperature sensor. The temperature sensor obtains temperature information. The first circuit is configured to apply a voltage to the second gate depending on the temperature information. The first circuit preferably includes a comparator. The second circuit is configured to apply a negative voltage to the second gate and hold the negative voltage.
1. A semiconductor device comprising:
a transistor; and
a first circuit,
wherein the transistor includes a first gate and a second gate,
wherein the first gate and the second gate overlap with each other with a semiconductor layer positioned therebetween,
wherein the first circuit includes a temperature sensor and a comparator,
wherein the temperature sensor is configured to obtain temperature information, and
wherein the first circuit is configured to apply, to the second gate, a voltage depending on the temperature information.
2. The semiconductor device according to claim 1 ,
wherein the semiconductor layer includes a metal oxide.
3. The semiconductor device according to claim 1 , further comprising a second circuit,
wherein the second circuit is configured to apply a negative voltage to the second gate.
4. The semiconductor device according to claim 3 ,
wherein the second circuit is configured to hold the negative voltage.
5. The semiconductor device according to claim 4 ,
wherein the second circuit includes a transistor including a metal oxide in a channel formation region.
6. A semiconductor device comprising:
a transistor; and
a first circuit,
wherein the transistor includes a first gate and a second gate,
wherein the first gate and the second gate overlap with each other with a semiconductor layer positioned therebetween,
wherein the first circuit includes a temperature sensor and a capacitor,
wherein the temperature sensor is configured to obtain temperature information, and
wherein the first circuit is configured to apply a voltage to the second gate through the capacitor, the voltage depending on the temperature information.
7. The semiconductor device according to claim 6 ,
wherein the first circuit includes a comparator.
8. The semiconductor device according to claim 6 ,
wherein the semiconductor layer includes a metal oxide.
9. The semiconductor device according to claim 6 , further comprising a second circuit,
wherein the second circuit is configured to apply a negative voltage to the second gate.
10. The semiconductor device according to claim 9 ,
wherein the second circuit is configured to hold the negative voltage.
11. The semiconductor device according to claim 10 ,
wherein the second circuit includes a transistor including a metal oxide in a channel formation region.
12. A semiconductor device comprising:
a first transistor;
a first circuit;
a voltage generation circuit; and
a second circuit,
wherein the first transistor includes a first gate and a second gate,
wherein the first gate and the second gate overlap with each other with a semiconductor layer positioned therebetween,
wherein the first circuit includes a temperature sensor and a capacitor,
wherein the voltage generation circuit is electrically connected to the second gate of the first transistor through the second circuit;
wherein the temperature sensor is configured to obtain temperature information,
wherein the first circuit is configured to apply a voltage to the second gate through the capacitor, the voltage depending on the temperature information, and
wherein the second circuit includes a second transistor including an oxide semiconductor in a channel formation region.
13. The semiconductor device according to claim 12 ,
wherein the first circuit includes a comparator.
14. The semiconductor device according to claim 12 ,
wherein the semiconductor layer in the first transistor includes a metal oxide.
15. The semiconductor device according to claim 12 ,
wherein the second circuit is configured to apply a negative voltage to the second gate.
16. The semiconductor device according to claim 15 ,
wherein the second circuit is configured to hold the negative voltage.