Semiconductor device
A semiconductor device includes an active region on a substrate, a device isolation film on the substrate to define the active region, a gate trench including a first portion in the active region and a second portion in the device isolation film, a gate electrode including a first gate embedded in the first portion of the gate trench and a second gate embedded in the second portion of the gate trench, a first gate capping pattern on the first gate and filling the first portion of the gate trench, and a second gate capping pattern on the second gate and filling the second portion of the gate trench, an upper surface of the first gate being higher than an upper surface of the second gate, and the first gate capping pattern and the second gate capping pattern have different structures.
1. A semiconductor device, comprising:
an active region on a substrate;
a device isolation film on the substrate to define the active region;
a gate trench through the device isolation film and through the active region, the gate trench including a first portion in the active region and a second portion in the device isolation film;
a gate electrode including a first gate embedded in the first portion of the gate trench and a second gate embedded in the second portion of the gate trench, an upper surface of the second gate being lower than an upper surface of the first gate; and
a gate capping pattern on the second gate and filling the second portion of the gate trench.
2. The semiconductor device as claimed in claim 1 , wherein the gate capping pattern includes a first insulating layer and a second-insulating layer having a dielectric constant lower than a dielectric constant of the first insulating layer, the second insulating layer surrounding a lateral surface and a lower surface of the first insulating layer.
3. The semiconductor device as claimed in claim 2 , wherein the first insulating layer includes silicon nitride, and the second insulating layer includes a material having a dielectric constant lower than a dielectric constant of silicon nitride.
4. The semiconductor device as claimed in claim 2 , wherein the gate capping pattern includes an insulating layer and nitrogen cations trapped on a surface of the device isolation film adjacent to the second insulating layer.
5. The semiconductor device as claimed in claim 1 , wherein the gate capping pattern includes an insulating layer and an air gap.
6. The semiconductor device as claimed in claim 1 , wherein a width of the second gate is less than a width of the first gate.
7. The semiconductor device as claimed in claim 1 , further comprising a source/drain region on the active region, the second gate not overlapping the source/drain region.
8. The semiconductor device as claimed in claim 7 , further comprising an information storage element electrically connected to the source/drain region.
9. The semiconductor device as claimed in claim 8 , wherein the information storage element is a capacitor.
10. A semiconductor device, comprising:
a substrate including an active region and a device isolation film defining the active region;
a gate trench through the device isolation film and through the active region, the gate trench including a first portion in the active region and a second portion in the device isolation film;
a gate electrode including a first gate embedded in the first portion of the gate trench and a second gate embedded in the second portion of the gate trench, a bottom of the second gate being lower than a bottom of the first gate; and
a gate capping pattern on the second gate and filling the second portion of the gate trench.
11. The semiconductor device as claimed in claim 10 , wherein the gate capping pattern includes a first insulating layer having a first dielectric constant, and a second insulating layer having a second dielectric constant lower than the first dielectric constant and surrounding a lateral surface and a lower surface of the first insulating layer.
12. The semiconductor device as claimed in claim 11 , wherein the first insulating layer includes silicon nitride, and the second insulating layer includes a material having a dielectric constant lower than a dielectric constant of silicon nitride.
13. The semiconductor device as claimed in claim 11 , wherein the gate capping pattern includes a insulating layer and nitrogen cations trapped on a surface of the device isolation film adjacent to the second insulating layer.
14. The semiconductor device as claimed in claim 10 , wherein the gate capping pattern includes a insulating layer and an air gap.
15. The semiconductor device as claimed in claim 10 , wherein a width of the second gate is less than a width of the first gate.
16. The semiconductor device as claimed in claim 10 , further comprising a source/drain region on the active region, the source/drain region not overlapping the second gate.
17. The semiconductor device as claimed in claim 16 , further comprising an information storage element electrically connected to the source/drain region.