CMOS image sensors including a vertical source follower gate

1. A complementary metal oxide semiconductor (CMOS) image sensor comprising:

a substrate comprising a first surface, a second surface facing the first surface, and a first recess region that is recessed from the first surface toward the second surface;

a transfer gate on the substrate; and

a source follower gate on the first recess region,

wherein the source follower gate is within the first recess region and partially covers the first surface of the substrate,

wherein the source follower gate is coupled to a floating diffusion region of the CMOS image sensor,

wherein the transfer gate is spaced apart from the source follower gate,

wherein a portion of the transfer gate is in a second recess region extending from the first surface toward the second surface of the substrate,

wherein the source follower gate extends to a first depth from the first surface toward the second surface of the substrate, and

wherein the transfer gate extends to a second depth from the first surface toward the second surface of the substrate, the second depth being greater than the first depth.

2. The CMOS image sensor of claim 1 , wherein the source follower gate comprises:

a lower portion in the first recess region; and

an upper portion that is connected to the lower portion and that is on the first surface of the substrate.

3. The CMOS image sensor of claim 1 , further comprising:

a photoelectric conversion layer in the substrate, wherein the photoelectric conversion layer has a first conductivity type; and

a well impurity layer on the photoelectric conversion layer, wherein the well impurity layer is adjacent the first surface of the substrate and has a second conductivity type.

4. The CMOS image sensor of claim 3 , wherein the first recess region is provided in the well impurity layer that has the second conductivity type and is spaced apart from the photoelectric conversion layer that has the first conductivity type.

5. A complementary metal oxide semiconductor (CMOS) image sensor comprising:

a first device isolation layer in a substrate and defining a first pixel region and a second pixel region;

a second device isolation layer defining first and second active sections in each of the first and second pixel regions;

a source follower gate on the second active section of the first pixel region;

a first transfer gate on the first active section of the first pixel region; and

a second transfer gate on the first active section of the second pixel region,

wherein the source follower gate comprises:

a first lower portion in a first recess region on the second active section of the first pixel region; and

a first upper portion that is connected to the first lower portion and is on a top surface of the substrate.

6. The CMOS image sensor of claim 5 ,

wherein the first transfer gate comprises:

a second lower portion in a second recess region on the first active section of the first pixel region; and

a second upper portion that is connected to the second lower portion and is on the top surface of the substrate, and

wherein the second transfer gate comprises:

a third lower portion in a third recess region on the first active section of the second pixel region; and

a third upper portion that is connected to the third lower portion and is on the top surface of the substrate.

7. The CMOS image sensor of claim 6 , wherein the first lower portion has a first depth, the second lower portion has a second depth, and the third lower portion has a third depth,

wherein the first depth is less than the second depth and the third depth.

8. The CMOS image sensor of claim 5 , wherein the first lower portion extends from the first upper portion toward the substrate, and

wherein the first lower portion is one of a plurality of first lower portions connected to the first upper portion.

9. The CMOS image sensor of claim 5 , wherein the first and second transfer gates are planar structures on the top surface of the substrate.

10. The CMOS image sensor of claim 5 , wherein the first and second pixel regions are arranged such that the first active sections of the first and second pixel regions are adjacent each other.

11. The CMOS image sensor of claim 5 , further comprising:

a first floating diffusion region on a side of the first transfer gate in the substrate;

a second floating diffusion region on a side of the second transfer gate in the substrate; and

a reset gate on the second active section of the second pixel region,

wherein the source follower gate, the first and second floating diffusion regions, and an impurity region of the reset gate are electrically connected to each other.

12. The CMOS image sensor of claim 5 , further comprising a photoelectric conversion layer in the substrate of each of the first and second pixel regions, wherein the first device isolation layer surrounds the photoelectric conversion layer in a plan view.

13. A complementary metal oxide semiconductor (CMOS) image sensor comprising:

a substrate comprising a first surface and a second surface that is opposite the first surface,

wherein the first surface comprises a first portion and a second portion, and

wherein the first portion of the first surface is a first distance from the second surface, and

wherein the second portion of the first surface is a second distance that is smaller than the first distance from the second surface;

a photoelectric conversion layer in the substrate, wherein the photoelectric conversion layer has a first conductivity type;

a well impurity layer on the photoelectric conversion layer, wherein the well impurity layer has a second conductivity type, different from the first conductivity type; and

a source follower gate on the substrate,

wherein the source follower gate has a first portion of the source follower gate on the first portion of the first surface and a second portion of the source follower gate on the second portion of the first surface, and

wherein the second portion of the first surface that is closest to the second surface is in the well impurity layer and on the photoelectric conversion layer.

14. The CMOS image sensor of claim 13 , further comprising:

a first device isolation layer in the substrate and adjacent the photoelectric conversion layer; and

a second device isolation layer in the well impurity layer and adjacent the first device isolation layer.

15. The CMOS image sensor of claim 13 , wherein the first surface of the substrate further comprises a third portion that is a third distance, smaller than the first distance, from the second surface, and

wherein the source follower gate further comprises a third portion of the source follower gate on the third portion of the first surface.

16. The CMOS image sensor of claim 13 , wherein the source follower gate further comprises a gap in the second portion of the source follower gate that extends from an upper surface of the source follower gate towards the second portion of the first surface, and

wherein a region of the second portion of the source follower gate is between the gap and the second portion of the first surface.