OLED pixel driving circuit and OLED display device
View Patent ↗The invention provides an OLED pixel driving circuit and OLED display device. The OLED pixel driving circuit uses 4T1C structure and switch (K). The first pin (K 1 ) of switch (K) is connected to the drain of the third TFT (T 3 ), the second pin (K 2 ) connected to the DAC (DAC), and the third pin (K 3 ) connected to the ADC (ADC). By the switch signal (Switch) controlling the switch (K), the first pin (K 1 ) and the second pin (K 3 ) are connected to enter the display mode, and by the switch signal (Switch) controlling the switch (K), the first pin (K 1 ) and the third pin (K 3 ) are connected to enter the sense mode, so that the ADC (ADC) senses the threshold voltage of the fourth TFT (T 4 ), converted by ADC (ADC) for data compensation in the display mode. The invention can compensate, improve display uniform, improve pixel aperture ratio and reduce manufacturing cost.
1. An organic light-emitting diode (OLED) pixel driving circuit, comprising: a first thin film transistor (TFT), a second TFT, a third TFT, a fourth TFT, a capacitor, an OLED, and a switch, a digital-to-analog converter (DAC) and an analog-to-digital converter (ADC) disposed in a driving integrated circuit (IC), operation states of the OLED pixel driving circuit comprising a display mode and a sense mode;
the switch being controlled by a switch signal, comprising a first pin, a second pin, and a third pin;
the first TFT having a gate connected to a scan signal, a drain connected to a power source, and a source connected to a drain of the second TFT, a gate of the fourth TFT, and an end of the capacitor; the second TFT having a gate connected to the scan signal, and a source connected to a common ground voltage; the fourth TFT having a drain connected to a power source voltage, and a source connected to an anode of the OLED; the OLED having a cathode connected to the common ground voltage; the capacitor having the other end connected to the source of the fourth TFT; the third TFT having a gate connected to the scan signal in the display mode and connected to the sensing control signal in the sense mode, a source connected to the source of the fourth TFT, and a drain connected to the first pin of the switch; the first TFT having an impedance ratio to an impedance of the second TFT;
the switch having the second pin connected to the DAC, and the third pin connected to the ADC;
in the display mode, the switch signal controlling the switch to connect the first pin and the second pin, and the DAC providing the data signal; in the sense mode, the DAC first providing a low voltage signal, and then the switch signal controlling the switch to connect the first pin and the third pin so that the ADC sensing a threshold voltage of the fourth TFT.
2. The OLED pixel driving circuit as claimed in claim 1 , wherein in the display mode, the data signal has a voltage not higher than a threshold voltage of the OLED; the first TFT and the second TFT perform voltage division on the power source voltage so that the gate of the fourth TFT has a voltage higher than the sum of the threshold voltage of the OLED and the threshold voltage of the fourth TFT.
3. The OLED pixel driving circuit as claimed in claim 2 , wherein the threshold voltage of the OLED is 9V-11V.
4. The OLED pixel driving circuit as claimed in claim 2 , wherein in the display mode, the scan signal first provides a high voltage pulse and then maintains at low voltage; the common ground voltage always stays at low voltage; the data signal stays at a high voltage from a rising edge of the high voltage pulse of the scan signal;
in the sense mode, the scan signal first provides a high voltage pulse and then maintains at low voltage; the sensing control signal first provides a high voltage pulse synchronized with the high voltage pulse of the scan signal and then maintains at low voltage.
5. The OLED pixel driving circuit as claimed in claim 4 , wherein in the sense mode, the common ground voltage first provides a high voltage pulse synchronized with the high voltage pulse of the sensing control signal and then maintains at low voltage.
6. An organic light-emitting diode (OLED) display device, comprising an OLED pixel driving circuit; the OLED pixel driving circuit further comprising:
a first thin film transistor (TFT), a second TFT, a third TFT, a fourth TFT, a capacitor, an OLED, and a switch, a digital-to-analog converter (DAC) and an analog-to-digital converter (ADC) disposed in a driving integrated circuit (IC), operation states of the OLED pixel driving circuit comprising a display mode and a sense mode;
the switch being controlled by a switch signal, comprising a first pin, a second pin, and a third pin;
the first TFT having a gate connected to a scan signal, a drain connected to a power source, and a source connected to a drain of the second TFT, a gate of the fourth TFT, and an end of the capacitor; the second TFT having a gate connected to the scan signal, and a source connected to a common ground voltage; the fourth TFT having a drain connected to a power source voltage, and a source connected to an anode of the OLED; the OLED having a cathode connected to the common ground voltage; the capacitor having the other end connected to the source of the fourth TFT; the third TFT having a gate connected to the scan signal in the display mode and connected to the sensing control signal in the sense mode, a source connected to the source of the fourth TFT, and a drain connected to the first pin of the switch; the first TFT having an impedance ratio to an impedance of the second TFT;
the switch having the second pin connected to the DAC, and the third pin connected to the ADC;
in the display mode, the switch signal controlling the switch to connect the first pin and the second pin, and the DAC providing the data signal; in the sense mode, the DAC first providing a low voltage signal, and then the switch signal controlling the switch to connect the first pin and the third pin so that the ADC sensing a threshold voltage of the fourth TFT.
7. The OLED display device as claimed in claim 6 , wherein in the display mode, the data signal has a voltage not higher than a threshold voltage of the OLED; the first TFT and the second TFT perform voltage division on the power source voltage so that the gate of the fourth TFT has a voltage higher than the sum of the threshold voltage of the OLED and the threshold voltage of the fourth TFT.
8. The OLED display device as claimed in claim 7 , wherein the threshold voltage of the OLED is 9V-11V.
9. The OLED display device as claimed in claim 7 , wherein in the display mode, the scan signal first provides a high voltage pulse and then maintains at low voltage; the common ground voltage always stays at low voltage; the data signal stays at a high voltage from a rising edge of the high voltage pulse of the scan signal;
in the sense mode, the scan signal first provides a high voltage pulse and then maintains at low voltage; the sensing control signal first provides a high voltage pulse synchronized with the high voltage pulse of the scan signal and then maintains at low voltage.
10. The OLED pixel driving circuit as claimed in claim 9 , wherein in the sense mode, the common ground voltage first provides a high voltage pulse synchronized with the high voltage pulse of the sensing control signal and then maintains at low voltage.
11. An organic light-emitting diode (OLED) pixel driving circuit, comprising: a first thin film transistor (TFT), a second TFT, a third TFT, a fourth TFT, a capacitor, an OLED, and a switch, a digital-to-analog converter (DAC) and an analog-to-digital converter (ADC) disposed in a driving integrated circuit (IC), operation states of the OLED pixel driving circuit comprising a display mode and a sense mode;
the switch being controlled by a switch signal, comprising a first pin, a second pin, and a third pin;
the first TFT having a gate connected to a scan signal, a drain connected to a power source, and a source connected to a drain of the second TFT, a gate of the fourth TFT, and an end of the capacitor; the second TFT having a gate connected to the scan signal, and a source connected to a common ground voltage; the fourth TFT having a drain connected to a power source voltage, and a source connected to an anode of the OLED; the OLED having a cathode connected to the common ground voltage; the capacitor having the other end connected to the source of the fourth TFT; the third TFT having a gate connected to the scan signal in the display mode and connected to the sensing control signal in the sense mode, a source connected to the source of the fourth TFT, and a drain connected to the first pin of the switch; the first TFT having an impedance ratio to an impedance of the second TFT;
the switch having the second pin connected to the DAC, and the third pin connected to the ADC;
in the display mode, the switch signal controlling the switch to connect the first pin and the second pin, and the DAC providing the data signal; in the sense mode, the DAC first providing a low voltage signal, and then the switch signal controlling the switch to connect the first pin and the third pin so that the ADC sensing a threshold voltage of the fourth TFT;
wherein in the display mode, the data signal having a voltage not higher than a threshold voltage of the OLED; the first TFT and the second TFT performing voltage division on the power source voltage so that the gate of the fourth TFT having a voltage higher than the sum of the threshold voltage of the OLED and the threshold voltage of the fourth TFT;
wherein the threshold voltage of the OLED being 9V-11V;
wherein in the display mode, the scan signal first providing a high voltage pulse and then maintaining at low voltage; the common ground voltage always staying at low voltage; the data signal staying at a high voltage from a rising edge of the high voltage pulse of the scan signal;
in the sense mode, the scan signal first providing a high voltage pulse and then maintaining at low voltage; the sensing control signal first providing a high voltage pulse synchronized with the high voltage pulse of the scan signal and then maintaining at low voltage;
wherein in the sense mode, the common ground voltage first providing a high voltage pulse synchronized with the high voltage pulse of the sensing control signal and then maintaining at low voltage.