IP Library › Granted Patent US 12,249,278
Granted Patent B2
US 12,249,278 · App. 17/601,202 · Granted Mar 11, 2025

Stacked OLED microdisplay with low-voltage silicon backplane

Inventors: John Hamer (Rochester, NY); Marina Kondakova (Kendall, NY); Jeffrey Spindler (Ontario, NY); Bernd Richter (Dresden, DE); Philipp Wartenberg (Dresden, DE); Gerd Bunk (Dresden, DE); Uwe Vogel (Dresden, DE)
Assignees: OLEDWorks LLC; Fraunhofer-Gesellschaft e.V.
G09G3/3233H10K50/13H10K50/19H10K50/852H10K59/12H10K59/1213H10K59/123H10K59/131H10K59/32H10K59/876G09G2300/0426G09G2300/0842G09G2300/0861G09G2330/04H10K2102/3026
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Quick Facts
Patent No.
US 12,249,278
App. No.
17/601,202
Granted
Mar 11, 2025
Kind
B2
Abstract

A microdisplay comprising a light emitting OLED stack on top of a silicon-based backplane with individually addressable pixels and control circuitry wherein the light emitting OLED stack has three or more OLED units between a top electrode and a bottom electrode; and the control circuitry of the silicon-based backplane comprises at least two transistors with their channels connected in series between an external power source VDD, and the bottom electrode of the OLED stack. The light-emitting OLED stack preferably has a Vth of at least 7.5V or more. The control circuit can include a protection circuit comprised of a p-n diode, preferably a bipolar junction transistor.

Claims (25)

1. A microdisplay comprising a light emitting OLED stack on top of a silicon-based backplane with individually addressable pixels and control circuitry wherein:

the light emitting OLED stack has three or more OLED units between a top and a bottom electrode; and

the control circuitry of the silicon-based backplane comprises, for each individually addressable pixel, at least two transistors with their channels connected in series between an external power source V DD , and the bottom electrode of the OLED stack

where the transistors with their channels connected in series are both rated at 5V or lower.

2. The microdisplay of claim 1 wherein the Vth of the light emitting OLED stack is at least 7.5V or greater.

3. The microdisplay of claim 1 wherein the Vth of the light emitting OLED stack is at least 10V or greater.

4. The microdisplay of claim 1 wherein the OLED stack comprises four or more OLED light-emitting units.

5. The microdisplay of claim 1 wherein the OLED light-emitting units are each separated from each other by a charge-generation layer (CGL).

6. The microdisplay of claim 5 wherein the bottom electrode is segmented and each segment is in electrical contact with the control circuitry in the backplane.

7. The microdisplay of claim 6 wherein the OLED stack is top-emitting.

8. The microdisplay of claim 7 wherein the OLED stack forms a microcavity where the physical distance between the segmented bottom electrode and the top electrode is constant across all pixels.

9. A microdisplay comprising a light emitting OLED stack on top of a silicon-based backplane with individually addressable pixels and control circuitry wherein:

the light emitting OLED stack has three or more OLED units between a top and a bottom electrode; and

the control circuitry of the silicon-based backplane comprises, for each individually addressable pixel, at least two transistors with their channels connected in series between an external power source V DD , and the bottom electrode of the OLED stack

where the transistor closest to the power source is a driving transistor and is rated at 5V or lower and the transistor closest to the bottom electrode of the OLED is a switch transistor and is rated at greater than 5V.

10. The microdisplay of claim 1 wherein the two transistors with their channels connected in series are both p-channel transistors.

11. The microdisplay of claim 10 wherein the two transistors with their channels connected in series are each located in separate wells.

12. The microdisplay of claim 1 wherein the control circuitry additionally comprises a protection circuit comprising a p-channel transistor.

13. The microdisplay of claim 1 wherein the control circuitry additionally comprises a protection circuit comprising a p-n diode.

14. The microdisplay of claim 13 wherein the cathode of the p-n junction diode is connected to the node of the bottom electrode of the OLED stack and the anode is connected to a voltage reference V REF or a current reference I REF .

15. The microdisplay of claim 1 wherein the control circuitry additionally comprises a protection circuit comprising a bipolar junction transistor.

16. The microdisplay of claim 15 wherein the bipolar junction transistor is an NPN transistor wherein the base is connected either to a voltage source VPROTECT or a current source IPROTECT, the emitter is connected to a node connected to the bottom electrode of the OLED stack and the collector is connected to voltage source V DD .

17. The microdisplay of claim 15 wherein the base of the bipolar junction transistor is isolated, the emitter is connected to a node connected to the bottom electrode of the OLED stack and the collector is connected to voltage source V DD .

18. The microdisplay of claim 15 wherein the bipolar junction transistor is located in a separate well from the two transistors whose channels are connected in series.

19. The microdisplay of claim 18 wherein the two transistors with their channels connected in series are both p-channel transistors and are each located in separate n-wells and the bipolar junction transistor is a NPN transistor located in a separate p-well.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 6, 2021
From: HAMER, JOHN; SPINDLER, JEFFREY; KONDAKOVA, MARINA; RICHTER, BERND; WARTENBERG, PHILIPP; BUNK, GERD; VOGEL, UWE
To: OLEDWORKS LLC; FRAUNHOFER-GESELLSCHAFT ZUR FӧRDERUNG DER ANGEWANDTEN FORSCHUNG E.V.
Reel/Frame 057720/0602 →
Continuity (3)
Provisional Application 63054387 · Jul 21, 2020
Provisional Application 62966757 · Jan 28, 2020
Related Publication 20220199931A1 · Jun 23, 2022
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