IP Library › Granted Patent US 10,224,347
Granted Patent B2
US 10,224,347 · App. 15/496,092 · Granted Mar 5, 2019

Semiconductor device, display device, and electronic appliance

Inventor: Hajime Kimura (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L27/124G09G3/3233G09G3/3241H01L27/1225H01L27/1255H01L27/3206H01L27/3276G09G3/3266G09G3/3648G09G2300/0842G09G2310/0248G09G2310/0262G09G2310/08H01L27/3244
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,224,347
App. No.
15/496,092
Granted
Mar 5, 2019
Kind
B2
Abstract

In case the size of the transistor is enlarged, power consumption of the transistor is increased. Thus, the present invention provides a display device capable of preventing a current from flowing to a display element in signal writing operation without varying potentials of power source lines for supplying a current to the display element per row. In setting a gate-source voltage of a transistor by applying a predetermined current to the transistor, a potential of a gate terminal of the transistor is adjusted so as to prevent a current from flowing to a load connected to a source terminal of the transistor. Therefore, a potential of a wire connected to the gate terminal of the transistor is differentiated from a potential of a wire connected to a drain terminal of the transistor.

Claims (63)

1. A display device comprising:

a light emitting element;

a first transistor;

a second transistor;

a third transistor; and

a capacitor,

wherein one of a source and a drain of the first transistor is electrically connected to the light emitting element,

wherein the capacitor is electrically connected between a gate of the first transistor and the one of the source and the drain of the first transistor,

wherein one of a source and a drain of the second transistor is electrically connected to the light emitting element,

wherein one of a source and a drain of the third transistor is electrically connected to the gate of the first transistor,

wherein the other of the source and the drain of the first transistor is electrically connected to a first wire,

wherein the other of the source and the drain of the second transistor is electrically connected to a second wire,

wherein the other of the source and the drain of the third transistor is electrically connected to a third wire,

wherein a gate of the third transistor is electrically connected to a fourth wire,

wherein the first wire and the fourth wire cross,

wherein the third wire and the fourth wire cross,

wherein the capacitor comprises a first electrode, a second electrode and a third electrode,

wherein a semiconductor layer of the first transistor and the first electrode of the capacitor are over a first insulating film,

wherein a second insulating film is over the semiconductor layer of the first transistor and the first electrode of the capacitor,

wherein the second electrode of the capacitor is over the second insulating film,

wherein a third insulating film is over the second electrode of the capacitor,

wherein a pixel electrode and the third electrode of the capacitor are over the third insulating film, and

wherein the semiconductor layer of the first transistor comprises In, Ga, Zn and O.

2. The display device according to claim 1 ,

wherein a gate of the second transistor is electrically connected to a fifth wire.

3. The display device according to claim 1 ,

wherein a gate of the second transistor is electrically connected to the fourth wire.

4. The display device according to claim 1 , wherein the first wire is constantly supplied with a predetermined potential.

5. The display device according to claim 1 , wherein the second wire is electrically connected to a current source.

6. The display device according to claim 5 , wherein the current source is configured to set a signal current.

7. The display device according to claim 1 , wherein the third wire is constantly supplied with a predetermined potential.

8. A display device comprising:

a light emitting element;

a first transistor;

a second transistor;

a third transistor;

a fourth transistor; and

a capacitor,

wherein one of a source and a drain of the first transistor is electrically connected to the light emitting element,

wherein the capacitor is electrically connected between a gate of the first transistor and the one of the source and the drain of the first transistor,

wherein one of a source and a drain of the second transistor is electrically connected to the light emitting element,

wherein one of a source and a drain of the third transistor is electrically connected to the gate of the first transistor,

wherein the other of the source and the drain of the first transistor is electrically connected to one of a source and a drain of the fourth transistor,

wherein the other of the source and the drain of the fourth transistor is electrically connected to a first wire,

wherein the other of the source and the drain of the second transistor is electrically connected to a second wire,

wherein the other of the source and the drain of the third transistor is electrically connected to a third wire,

wherein a gate of the third transistor is electrically connected to a fourth wire,

wherein the first wire and the fourth wire cross,

wherein the third wire and the fourth wire cross,

wherein the capacitor comprises a first electrode, a second electrode and a third electrode,

wherein a semiconductor layer of the first transistor and the first electrode of the capacitor are over a substrate,

wherein a first insulating film is over the semiconductor layer of the first transistor and the first electrode of the capacitor,

wherein a gate electrode of the first transistor and the second electrode of the capacitor are over the first insulating film,

wherein a second insulating film is over the gate electrode of the first transistor and the second electrode of the capacitor,

wherein the third electrode of the capacitor is over the second insulating film,

wherein the third electrode of the capacitor is in contact with the first electrode of the capacitor, and

wherein the semiconductor layer of the first transistor comprises poly silicon.

9. The display device according to claim 8 ,

wherein a gate of the second transistor is electrically connected to the fourth wire.

10. The display device according to claim 8 , wherein the first wire is constantly supplied with a predetermined potential.

11. The display device according to claim 8 , wherein the second wire is electrically connected to a current source.

12. The display device according to claim 11 , wherein the current source is configured to set a signal current.

13. The display device according to claim 8 , wherein the third wire is constantly supplied with a predetermined potential.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 26, 2017
From: KIMURA, HAJIME
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 042519/0444 →
Priority Claims (1)
JP 2005-191145 · Jun 30, 2005 · national
Continuity (4)
Continuation 14644384 · Mar 11, 2015
Continuation 12716840 · Mar 3, 2010
Continuation 11425242 · Jun 20, 2006
Related Publication 20170229485A1 · Aug 10, 2017