IP Library Granted Patent US 10,230,989
Granted Patent B2
US 10,230,989 · App. 13/529,446 · Granted Mar 12, 2019

Method and apparatus for video encoding and/or decoding to prevent start code confusion

Inventors: Vivienne Sze (Dallas, TX); Madhukar Budagavi (Plano, TX); Akira Osamoto (Plano, TX); Yasutomo Matsuba (Allen, TX)
Assignee: TEXAS INSTRUMENTS INCORPORATED
H04N19/70
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Quick Facts
Patent No.
US 10,230,989
App. No.
13/529,446
Granted
Mar 12, 2019
Kind
B2
Abstract

A method and a video processor for preventing start code confusion. The method includes aligning bytes of a slice header relating to slice data when the slice header is not byte aligned or inserting differential data at the end of the slice header before the slice data when the slice header is byte aligned, performing emulation prevention byte insertion on the slice header, and combine the slice header and the slice data after performing emulation prevention byte insertion.

Claims (39)

1. A non-transitory computer readable medium comprising instructions that, when executed, cause a video processor to:

perform emulation prevention byte insertion on slice data associated with a slice header;

perform emulation prevention byte insertion on the slice header after performance of the emulation prevention byte insertion on the slice data; and

combine the slice header and the slice data after performing the emulation prevention byte insertion on the slice header.

2. The non-transitory computer readable medium of claim 1 , wherein the instructions that cause the video processor to perform emulation prevention byte insertion on the slice data include instructions that cause the video processor to perform emulation prevention byte insertion on the slice data independently from performing emulation prevention byte insertion on the slice header.

3. The non-transitory computer readable medium of claim 1 , wherein the instructions that cause the video processor to perform emulation prevention byte insertion on the slice data include instructions that cause the video processor to perform emulation prevention byte insertion on the slice data without using the slice header.

4. The non-transitory computer readable medium of claim 1 , wherein the instructions further cause the video processor to perform emulation prevention byte insertion on the slice data while at least one of Sample Adaptive Offset (SAO) and Adaptive Loop Filter (ALF) processes are taking place to generate at least one of SAO and ALF parameters for the slice header associated with the slice data.

5. The non-transitory computer readable medium of claim 1 , wherein the instructions further cause the video processor to insert data at the end of the slice header before the slice data only when the slice header ends with zeros.

6. The non-transitory computer readable medium of claim 5 , wherein the inserted data is ‘FF’.

7. A method comprising:

performing, with one or more processors, emulation prevention byte insertion on slice data associated with a slice header;

performing, with the one or more processors, emulation prevention byte insertion on the slice header after performance of the emulation prevention byte insertion on the slice data; and

combining, with the one or more processors, the slice header and the slice data after performing the emulation prevention byte insertion on the slice header.

8. The method of claim 7 , wherein performing the emulation prevention byte insertion on the slice data includes performing emulation prevention byte insertion on the slice data independently from performing emulation prevention byte insertion on the slice header.

9. The method of claim 7 , wherein performing the emulation prevention byte insertion on the slice data includes performing emulation prevention byte insertion on the slice data without using the slice header.

10. The method of claim 7 , wherein performing the emulation prevention byte insertion on the slice data includes performing emulation prevention byte insertion on the slice data while at least one of Sample Adaptive Offset (SAO) and Adaptive Loop Filter (ALF) processes are taking place to generate at least one of SAO and ALF parameters for the slice header associated with the slice data.

11. The method of claim 7 , wherein the instructions further cause the video processor to insert data at the end of the slice header before the slice data only when the slice header ends with zeros.

12. The method of claim 11 , wherein the inserted data is ‘FF’.

13. A device comprising one or more processors configured to:

perform emulation prevention byte insertion on slice data associated with a slice header;

perform emulation prevention byte insertion on the slice header after performance of the emulation prevention byte insertion on the slice data; and

combine the slice header and the slice data after performing the emulation prevention byte insertion on the slice header.

14. The device of claim 13 , wherein performing the emulation prevention byte insertion on the slice data includes performing emulation prevention byte insertion on the slice data without using the slice header.

15. The device of claim 13 , wherein performing the emulation prevention byte insertion on the slice data includes performing emulation prevention byte insertion on the slice data while at least one of Sample Adaptive Offset (SAO) and Adaptive Loop Filter (ALF) processes are taking place to generate at least one of SAO and ALF parameters for the slice header associated with the slice data.

16. A non-transitory computer readable medium comprising instructions that, when executed, cause a video processor to:

perform emulation prevention byte insertion on the slice data while at least one of Sample Adaptive Offset (SAO) and Adaptive Loop Filter (ALF) processes are taking place to generate at least one of SAO and ALF parameters for the slice header associated with the slice data,

perform emulation prevention byte insertion on the slice header in parallel with or after performance of the emulation prevention byte insertion on the slice data; and

combine the slice header and the slice data after performing the emulation prevention byte insertion on the slice header.

17. The non-transitory computer readable medium of claim 16 , wherein the instructions that cause the video processor to perform emulation prevention byte insertion on the slice header in parallel with or after performance of the emulation prevention byte insertion on the slice data include instructions that cause the video processor to perform emulation prevention byte insertion on the slice header in parallel with performance of the emulation prevention byte insertion on the slice data.

18. A method comprising:

performing, with one or more processors, emulation prevention byte insertion on the slice data while at least one of Sample Adaptive Offset (SAO) and Adaptive Loop Filter (ALF) processes are taking place to generate at least one of SAO and ALF parameters for the slice header associated with the slice data;

performing, with the one or more processors, emulation prevention byte insertion on the slice header in parallel with or after performance of the emulation prevention byte insertion on the slice data; and

combining, with the one or more processors, the slice header and the slice data after performing the emulation prevention byte insertion on the slice header.

19. The method of claim 18 , wherein performing the emulation prevention byte insertion on the slice header in parallel with or after performance of the emulation prevention byte insertion on the slice data includes performing emulation prevention byte insertion on the slice header in parallel with performance of the emulation prevention byte insertion on the slice data.

20. A device comprising one or more processors configured to:

perform emulation prevention byte insertion on the slice data while at least one of Sample Adaptive Offset (SAO) and Adaptive Loop Filter (ALF) processes are taking place to generate at least one of SAO and ALF parameters for the slice header associated with the slice data;

perform emulation prevention byte insertion on the slice header in parallel with or after performance of the emulation prevention byte insertion on the slice data; and

combine the slice header and the slice data after performing the emulation prevention byte insertion on the slice header.

21. The device of claim 20 , wherein performing the emulation prevention byte insertion on the slice header in parallel with or after performance of the emulation prevention byte insertion on the slice data includes performing emulation prevention byte insertion on the slice header in parallel with performance of the emulation prevention byte insertion on the slice data.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 2, 2012
From: SZE, VIVIENNE; BUDAGAVI, MADHUKAR; OSAMOTO, AKIRA; MATSUBA, YASUTOMO
To: TEXAS INSTRUMENTS INCORPORATED
Reel/Frame 029060/0011 →
Continuity (3)
Provisional Application 61499276 · Jun 21, 2011
Provisional Application 61502387 · Jun 29, 2011
Related Publication 20130163677A1 · Jun 27, 2013
Cited By (1)
US 12,634,522