IP Library Granted Patent US 12,634,522
Granted Patent B2
US 12,634,522 · App. 18/541,623 · Granted May 19, 2026

Prevention of start code confusion

Inventors: Vivienne Sze (Dallas, TX); Madhukar Budagavi (Plano, TX); Akira Osamoto (Plano, TX); Yasutomo Matsuba (Allen, TX)
Assignee: TEXAS INSTRUMENTS INCORPORATED
H04N19/70
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Quick Facts
Patent No.
US 12,634,522
App. No.
18/541,623
Granted
May 19, 2026
Kind
B2
Abstract

A method and a video processor for preventing start code confusion. The method includes aligning bytes of a slice header relating to slice data when the slice header is not byte aligned or inserting differential data at the end of the slice header before the slice data when the slice header is byte aligned, performing emulation prevention byte insertion on the slice header, and combine the slice header and the slice data after performing emulation prevention byte insertion.

Claims (53)

1 . A system comprising:

a receiver configurable to receive a bit stream including a slice header and slice data; and

a decoder coupled to the receiver and configurable to:

decode a first alignment bit from the slice header in the bit stream, wherein the first alignment bit has a binary value of one;

decode one or more additional alignment bits from the slice header after decoding the first alignment bit, wherein each bit of the one or more additional alignment bits has a binary value of zero, and wherein the one or more additional alignment bits are positioned at an end of the slice header immediately after the first alignment bit;

decode the slice data after decoding the slice header;

identify a pattern in the bit stream, wherein a first portion of the pattern is in the slice header, and wherein a second portion of the pattern is in the slice data; and

remove an emulation prevention byte from the slice data in response to identifying the pattern in the bit stream.

2 . The system of claim 1 , wherein the decoder is configurable to decode slice-header information from the slice header.

3 . The system of claim 1 , wherein the decoder is configurable to perform a second byte alignment at an end of the slice data after decoding data in the slice data.

4 . The system of claim 1 , wherein the decoder is configurable to decode the one or more additional alignment bits while the slice header is not byte aligned.

5 . The system of claim 1 , wherein a first bit in the slice data is a next bit decoded immediately after decoding a last bit of the one or more additional alignment bits.

6 . The system of claim 1 , wherein the decoder is configurable to determine that the slice header is byte aligned after the one or more additional alignment bits.

7 . The system of claim 1 ,

wherein the bit stream includes a coded representation of an image,

wherein the coded representation includes the slice header and the slice data, and

wherein the system further comprises a light emitting diode display configurable to display the image.

8 . The system of claim 1 ,

wherein the bit stream includes a coded representation of an image,

wherein the coded representation includes the slice header and the slice data, and

wherein the system further comprises a liquid crystal display configurable to display the image.

9 . A system comprising:

a receiver configurable to receive a bit stream including a coded representation of an image, wherein the coded representation includes a slice header and slice data;

a decoder coupled to the receiver and configurable to:

decode a first alignment bit from the slice header in the bit stream, wherein the first alignment bit has a binary value of one;

determine that the slice header is byte aligned after the first alignment bit;

decode the slice data in response to determining that the slice header is byte aligned, wherein the slice data is positioned immediately after the first alignment bit in the bit stream;

identify a pattern in the bit stream, wherein a first portion of the pattern is in the slice header, and wherein a second portion of the pattern is in the slice data; and

remove an emulation prevention byte from the slice data in response to identifying the pattern in the bit stream; and

a display coupled to the decoder and configurable to display the image based on the slice data.

10 . The system of claim 9 , wherein the display includes a light emitting diode display configurable to display the image.

11 . The system of claim 9 , wherein the display includes a liquid crystal display configurable to display the image.

12 . The system of claim 9 , wherein a first bit in the slice data is a next bit decoded immediately after decoding the first alignment bit.

13 . A method comprising:

receiving a bit stream including a slice header and slice data;

decoding a first alignment bit from the slice header in the bit stream, wherein the first alignment bit has a binary value of one;

decoding one or more additional alignment bits from the slice header after decoding the first alignment bit, wherein each bit of the one or more additional alignment bits has a binary value of zero, and wherein the one or more additional alignment bits are positioned at an end of the slice header immediately after the first alignment bit;

decoding the slice data after decoding the slice header;

identifying a pattern in the bit stream, wherein a first portion of the pattern is in the slice header, and wherein a second portion of the pattern is in the slice data; and

removing an emulation prevention byte from the slice data in response to identifying the pattern in the bit stream.

14 . The method of claim 13 , further comprising displaying an image based on the slice data.

15 . The method of claim 13 , further comprising performing a second byte alignment at an end of the slice data after decoding data in the slice data.

16 . The method of claim 13 , further comprising decoding the one or more additional alignment bits while the slice header is not byte aligned.

17 . The method of claim 13 , wherein a first bit in the slice data is a next bit decoded immediately after decoding a last bit of the one or more additional alignment bits.

18 . The method of claim 13 , further comprising determining that the slice header is byte aligned after the one or more additional alignment bits.

19 . The method of claim 13 ,

wherein the bit stream includes a coded representation of an image,

wherein the coded representation includes the slice header and the slice data, and

wherein the method further comprises displaying the image via a light emitting diode display.

20 . The method of claim 13 ,

wherein the bit stream includes a coded representation of an image,

wherein the coded representation includes the slice header and the slice data, and

wherein the method further comprises displaying the image via a liquid crystal display.

Continuity (6)
Continuation 17350471 · Jun 17, 2021
Continuation 16263309 · Jan 31, 2019
Continuation 13529446 · Jun 21, 2012
Provisional Application 61499276 · Jun 21, 2011
Provisional Application 61502387 · Jun 29, 2011
Related Publication 20240114174A1 · Apr 4, 2024
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