IP Library › Granted Patent US 10,263,072
Granted Patent B2
US 10,263,072 · App. 15/798,129 · Granted Apr 16, 2019

Integrated RF front end system

Inventors: Michael Joseph McPartlin (North Andover, MA); Mark M. Doherty (Westford, MA)
Assignee: Skyworks Solutions, Inc.
H01L29/0646H01L21/76H01L21/761H01L23/66H01L27/067H01L27/0823H01L29/0603H01L29/0821H01L29/0826H01L29/165H01L29/66242H01L29/737H01L29/7371H01L29/7378H01Q1/24H03F3/195H03F3/245H01L2223/665H01L2223/6655H01L2223/6677H01L2224/0603H01L2224/48137H01L2224/48247H01L2224/48257H01L2224/48465H01L2224/48471H01L2224/49111H01L2224/49113H01L2224/49171H01L2224/73265H01L2924/181H01L2924/1815H03F2200/222H03F2200/294H03F2200/318H03F2200/387H03F2200/411H03F2200/451
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Quick Facts
Patent No.
US 10,263,072
App. No.
15/798,129
Granted
Apr 16, 2019
Kind
B2
Abstract

Systems and methods are disclosed for integrating functional components of front-end modules for wireless radios. Front-end modules disclosed may be dual-band front-end modules for use in 802.11ac-compliant devices. In certain embodiments, integration of front-end module components on a single die is achieved by implementing a high-resistivity layer or substrate directly underneath, adjacent to, and/or supporting SiGe BiCMOS technology elements.

Claims (30)

1. A semiconductor device for an integrated front-end module comprising:

a silicon substrate having a high-resistivity portion;

an active radio frequency device disposed on the substrate above the high-resistivity portion;

a low-resistivity well disposed a first distance away from the active radio frequency device and providing at least partial electrical isolation between the active radio frequency device and a passive device; and

a trench disposed between the active radio frequency device and the low-resistivity well, the trench configured to impede movement across the trench of carriers in the high resistivity portion of the silicon substrate.

2. The semiconductor device of claim 1 wherein the active radio frequency device is a transistor and the low-resistivity well at least partially surrounds a collector of the transistor.

3. The semiconductor device of claim 1 wherein the trench is spaced apart from the active radio frequency device and spaced apart from the low-resistivity well.

4. The semiconductor device of claim 1 wherein the trench is disposed immediately adjacent to the low-resistivity well.

5. The semiconductor device of claim 1 further comprising a low-resistivity epitaxial layer of a different impurity type than an impurity type of the silicon substrate, the low-resistivity epitaxial layer disposed above the silicon substrate.

6. The semiconductor device of claim 1 further comprising a high-resistivity region disposed a second distance from the active radio frequency device and at least partially surrounding the active radio frequency device, the second distance greater than the first distance.

7. The semiconductor device of claim 6 wherein the passive device is disposed directly above the high-resistivity region.

8. The semiconductor device of claim 1 wherein the low-resistivity well at least partially surrounds the active radio frequency device.

9. A wireless device comprising:

a front-end module including a silicon substrate, an active radio frequency device, a low-resistivity well, and a trench, the silicon substrate having a high-resistivity portion, the active radio frequency device disposed on the substrate above the high-resistivity portion, the low-resistivity well disposed a first distance away from the active radio frequency device, the low-resistivity well providing at least partial electrical isolation between the active radio frequency device and a passive device, the trench disposed between the active radio frequency device and the low-resistivity well, and the trench configured to impede movement across the trench of carriers in the high resistivity portion of the silicon substrate; and

an antenna in electrical communication with the front-end module, the antenna configured to receive and transmit wireless signals.

10. The wireless device of claim 9 wherein the active radio frequency device is a transistor and the low-resistivity well at least partially surrounds a collector of the transistor.

11. The wireless device of claim 9 wherein the trench is spaced apart from the active radio frequency device and spaced apart from the low-resistivity well.

12. The wireless device of claim 9 wherein the trench is disposed immediately adjacent to the low-resistivity well.

13. The wireless device of claim 9 wherein the front-end module further includes a low-resistivity epitaxial layer of a different impurity type than an impurity type of the silicon substrate, the low-resistivity epitaxial layer disposed above the silicon substrate.

14. The wireless device of claim 9 wherein the front-end module further includes a high-resistivity region disposed a second distance from the active radio frequency device and at least partially surrounding the active radio frequency device, the second distance greater than the first distance.

15. The wireless device of claim 14 wherein the passive device is disposed directly above the high-resistivity region.

16. A method of fabricating a front-end module, the method comprising:

creating, from a silicon wafer, a silicon substrate having a high-resistivity portion;

disposing an active radio frequency device on the substrate above the high-resistivity portion;

forming a low-resistivity well at least partially around the active radio frequency device and a first distance away from the active radio frequency device, the low-resistivity well providing at least partial electrical isolation between the active radio frequency device and a passive device; and

forming a trench between the active radio frequency device and the low-resistivity well, the trench configured to impede movement across the trench of carriers in the high resistivity portion of the silicon substrate.

17. The method of claim 16 further comprising forming a low-resistivity epitaxial layer of a different impurity type than an impurity type of the silicon substrate.

18. The method of claim 17 wherein forming the low-resistivity epitaxial layer includes causing a low-resistivity material to out-diffuse from a sub-collector region of the silicon substrate and to form on a surface of the silicon substrate.

19. The method of claim 16 further comprising forming a high-resistivity region a second distance from the active radio frequency device that is greater than the first distance, the high-resistivity region at least partially surrounding the active radio frequency device.

20. The method of claim 19 wherein forming the high-resistivity region includes treating a top layer of the silicon substrate with a crystal lattice destroying agent.

Continuity (4)
Continuation 15216620 · Jul 21, 2016
Continuation 14703465 · May 4, 2015
Continuation 13536749 · Jun 28, 2012
Related Publication 20180130876A1 · May 10, 2018
Cited By (4)
US 12,476,595 US 12,500,557 US 12,531,527 US 12,537,487