Methods and apparatus for transmission lines in packages
Methods and apparatus for forming a semiconductor device package with a transmission line using a micro-bump layer are disclosed. The micro-bump layer may comprise micro-bumps and micro-bump lines, formed between a top device and a bottom device. A signal transmission line may be formed using a micro-bump line above a bottom device. A ground plane may be formed using a redistribution layer (RDL) within the bottom device, or using additional micro-bump lines. The RDL formed ground plane may comprise open slots. There may be RDLs at the bottom device and the top device above and below the micro-bump lines to form parts of the ground planes.
1. A method comprising:
forming a first redistribution layer over a first substrate, the first redistribution layer comprising a first redistribution line;
forming a first insulator layer over the first redistribution layer;
forming a first micro-bump line, a second micro-bump line, a third micro-bump line, and a micro-bump, wherein the first micro-bump line, the second micro-bump line, and the third micro-bump line extend over the first insulator layer, wherein the micro-bump extends through an opening in the first insulator layer to the first redistribution line, wherein the first micro-bump line, the second micro-bump line, the third micro-bump line, and the micro-bump comprise same layers of same materials, wherein the second micro-bump line is interposed between the first micro-bump line and the third micro-bump line, the first micro-bump line and the third micro-bump line form a pair of ground planes, the second micro-bump line being a signal transmission line; and
attaching a second substrate to the first substrate via the micro-bump, wherein the first substrate and the second substrate are not electrically coupled via the first micro-bump line, the second micro-bump line, or the third micro-bump line.
2. The method of claim 1 , further comprising forming an underfill between the first substrate and the second substrate, the underfill completely separating the first micro-bump line, the second micro-bump line, and the third micro-bump line from the second substrate.
3. The method of claim 2 , wherein the underfill extends along sidewalls of the first micro-bump line, the second micro-bump line, and the third micro-bump line.
4. The method of claim 1 , further comprising forming a second redistribution line, the second redistribution line being coupled to ground, the second redistribution line extending below the second micro-bump line.
5. The method of claim 4 , wherein the second redistribution line extends laterally from the first micro-bump line to the third micro-bump line in a plan view.
6. The method of claim 5 , further comprising forming a first via and a second via, the first via electrically coupling the first micro-bump line to the second redistribution line and the second via electrically coupling the third micro-bump line to the second redistribution line.
7. The method of claim 5 , further comprising forming a first plurality of vias and a second plurality of vias, the first plurality of vias extending between the first micro-bump line to the second redistribution line, the second plurality of vias extending between the third micro-bump line to the second redistribution line.
8. The method of claim 4 , wherein forming the second redistribution line comprises forming a plurality of slots in the second redistribution line.
9. The method of claim 1 , wherein each of the first micro-bump line, the second micro-bump line, and the third micro-bump line comprises solder.
10. A method comprising:
forming a first insulator layer over a first redistribution line, the first redistribution line being over a first substrate; and
forming a first micro-bump line, a second micro-bump line, a third micro-bump line, and a micro-bump, wherein the first micro-bump line, the second micro-bump line, and the third micro-bump line extend over the first insulator layer, wherein the micro-bump extends through an opening in the first insulator layer to the first redistribution line, wherein the first micro-bump line, the second micro-bump line, the third micro-bump line and the micro-bump comprise same layers of same materials, wherein the second micro-bump line is interposed between the first micro-bump line and the third micro-bump line, the first micro-bump line and the third micro-bump line being coupled to ground and being configured to be held at ground potential, the second micro-bump line being a signal transmission line.
11. The method of claim 10 , further comprising attaching a second substrate to the first substrate using the micro-bump, wherein the first substrate and the second substrate are not electrically coupled using the first micro-bump line, the second micro-bump line, or the third micro-bump line.
12. The method of claim 11 , further comprising forming an underfill between the first substrate and the second substrate, the underfill completely separating the first micro-bump line, the second micro-bump line, and the third micro-bump line from the second substrate.
13. The method of claim 12 , wherein the underfill extends along sidewalls of the first micro-bump line, the second micro-bump line, and the third micro-bump line.
14. The method of claim 10 , further comprising forming a second redistribution line, the second redistribution line being coupled to ground, the second redistribution line extending below the second micro-bump line.
15. The method of claim 14 , wherein the second redistribution line extends laterally from the first micro-bump line to the third micro-bump line in a plan view.
16. The method of claim 15 , further comprising forming a first via and a second via, the first via electrically coupling the first micro-bump line to the second redistribution line and the second via electrically coupling the third micro-bump line to the second redistribution line.
17. The method of claim 15 , further comprising forming a first plurality of vias and a second plurality of vias, the first plurality of vias extending between the first micro-bump line to the second redistribution line, the second plurality of vias extending between the third micro-bump line to the second redistribution line.
18. The method of claim 14 , wherein forming the second redistribution line comprises forming a plurality of slots in the second redistribution line.
19. A method comprising:
forming a polymer layer over a redistribution layer, the redistribution layer comprising a redistribution line over a first substrate; and
forming a first micro-bump line, a second micro-bump line, a third micro-bump line, and a micro-bump, wherein the first micro-bump line, the second micro-bump line, and the third micro-bump line extend over the polymer layer, wherein the micro-bump extends through an opening in the polymer layer to the redistribution line, wherein the first micro-bump line, the second micro-bump line, the third micro-bump line, and the micro-bump comprise same layers of same materials, wherein the second micro-bump line is interposed between the first micro-bump line and the third micro-bump line, the first micro-bump line and the third micro-bump line being directly coupled to ground, the second micro-bump line being a signal transmission line.
20. The method of claim 19 , further comprising attaching a second substrate to the first substrate using the micro-bump, wherein the first substrate and the second substrate are not electrically coupled using the first micro-bump line, the second micro-bump line, or the third micro-bump line.