Shift register and display device provided therewith
An output control node stabilization portion includes a thin film transistor having a gate terminal to which is provided a fourth clock that changes to an on level at timing at which a scanning signal outputted from a previous stage is to change from an off level to an on level, a drain terminal connected to an output control node, and a source terminal to which the scanning signal outputted from the previous stage is provided; and a thin film transistor having a gate terminal to which is provided a third clock that changes to an on level at timing at which a scanning signal outputted from a subsequent stage is to change from an off level to an on level, a drain terminal connected to the output control node, and a source terminal to which the scanning signal outputted from the subsequent stage is provided.
1. A shift register that includes a plurality of stages and drives scanning signal lines of a display device, each of the plurality of stages operating based on a plurality of clock signals, and each of the plurality of clock signals periodically repeating a first level and a second level, wherein
a stage-forming circuit that forms each of the plurality of stages includes:
an output node that outputs a scanning signal to a corresponding one of the scanning signal lines;
a first output node stabilization switching element having a control terminal to which one of the plurality of clock signals is provided; a first conductive terminal connected to the output node; and a second conductive terminal to which an off-level power supply potential is provided, the one of the plurality of clock signals changing from an off level to an on level at timing at which the scanning signal outputted from the output node is to change from an on level to an off level;
an output control switching element having a control terminal; a first conductive terminal to which one of the plurality of clock signals is provided; and a second conductive terminal connected to the output node, the one of the plurality of clock signals changing from an off level to an on level at timing at which the scanning signal outputted from the output node is to change from an off level to an on level;
an output control node connected to the control terminal of the output control switching element;
an output control node turn-on portion that receives, as a set signal, one of scanning signals outputted from output nodes of stages one or more stages before the stage, and changes a level of the output control node to an on level based on the set signal, the one of scanning signals changing from an off level to an on level at timing at which the output control node is to change from an off level to an on level;
an output control node turn-off portion that receives, as a reset signal, one of scanning signals outputted from output nodes of stages one or more stages after the stage, and changes the level of the output control node to an off level based on the reset signal, the one of scanning signals changing from an off level to an on level at timing at which the output control node is to change from an on level to an off level; and
an output control node stabilization portion that prevents the level of the output control node from fluctuating during a period during which the level of the output control node is to be maintained at an off level, and
the output control node stabilization portion includes:
a first output control node stabilization switching element having a control terminal to which one of the plurality of clock signals is provided; a first conductive terminal connected to the output control node; and a second conductive terminal to which a scanning signal outputted from an output node of a previous stage is provided, the one of the plurality of clock signals changing from an off level to an on level at timing at which the scanning signal outputted from the output node of the previous stage is to change from an off level to an on level;
a second output control node stabilization switching element having a control terminal to which one of the plurality of clock signals is provided; a first conductive terminal connected to the output control node directly or through another switching element and a second conductive terminal to which a scanning signal outputted from an output node of a subsequent stage is provided, the one of the plurality of clock signals changing from an off level to an on level at timing at which the scanning signal outputted from the output node of the subsequent stage is to change from an off level to an on level; and
a third output control node stabilization switching element having a control terminal to which the clock signal provided to the first conductive terminal of the output control switching element is provided; a first conductive terminal connected to the output control node; and a second conductive terminal connected to the first conductive terminal of the second output control node stabilization switching element.
2. The shift register according to claim 1 , wherein the output control node turn-on portion receives, as the set signal, a scanning signal outputted from an output node of a stage two stages before the stage.
3. The shift register according to claim 1 , wherein the output control node stabilization portion further includes a fourth output control node stabilization switching element having a control terminal to which an initialization signal is provided; a first conductive terminal connected to the output control node; and a second conductive terminal to which an off-level power supply potential is provided, the initialization signal changing from an off level to an on level immediately after a start of a vertical scanning period.
4. The shift register according to claim 1 , wherein the output control node stabilization portion further includes a fifth output control node stabilization switching element having a control terminal to which a clear signal is provided; a first conductive terminal connected to the output control node; and a second conductive terminal to which an off-level power supply potential is provided, the clear signal changing from an off level to an on level when a vertical scanning period ends.
5. The shift register according to claim 1 , wherein the stage-forming circuit further includes a second output node stabilization switching element having a control terminal to which a clear signal is provided; a first conductive terminal connected to the output node; and a second conductive terminal to which an off-level power supply potential is provided, the clear signal changing from an off level to an on level when a vertical scanning period ends.
6. A display device comprising:
a display unit in which a plurality of scanning signal lines are arranged; and
the shift register according to claim 1 , the shift register including a plurality of stages which are provided so as to have a one-to-one correspondence with the plurality of scanning signal lines.
7. The shift register according to claim 1 , wherein the switching elements included in the stage-forming circuit are thin-film transistors including an oxide semiconductor.
8. The shift register according to claim 7 , wherein the oxide semiconductor is indium gallium zinc oxide.
9. A shift register that includes a plurality of stages and drives scanning signal lines of a display device, each of the plurality of stages operating based on a plurality of clock signals, and each of the plurality of clock signals periodically repeating a first level and a second level, wherein
a stage-forming circuit that forms each of the plurality of stages includes:
an output node that outputs a scanning signal to a corresponding one of the scanning signal lines;
a first output node stabilization switching element having a control terminal to which one of the plurality of clock signals is provided; a first conductive terminal connected to the output node; and a second conductive terminal to which an off-level power supply potential is provided, the one of the plurality of clock signals changing from an off level to an on level at timing at which the scanning signal outputted from the output node is to change from an on level to an off level;
an output control switching element having a control terminal; a first conductive terminal to which one of the plurality of clock signals is provided; and a second conductive terminal connected to the output node, the one of the plurality of clock signals changing from an off level to an on level at timing at which the scanning signal outputted from the output node is to change from an off level to an on level;
an output control node connected to the control terminal of the output control switching element;
an output control node turn-on portion that receives, as a set signal, one of scanning signals outputted from output nodes of stages one or more stages before the stage, and changes a level of the output control node to an on level based on the set signal, the one of scanning signals changing from an off level to an on level at timing at which the output control node is to change from an off level to an on level;
an output control node turn-off portion that receives, as a reset signal, one of scanning signals outputted from output nodes of stages one or more stages after the stage, and changes the level of the output control node to an off level based on the reset signal, the one of scanning signals changing from an off level to an on level at timing at which the output control node is to change from an on level to an off level;
an output control node stabilization portion that prevents the level of the output control node from fluctuating during a period during which the level of the output control node is to be maintained at an off level; and
a second output node stabilization switching element having a control terminal to which a clear signal is provided; a first conductive terminal connected to the output node; and a second conductive terminal to which an off-level power supply potential is provided, the clear signal changing from an off level to an on level when a vertical scanning period ends, and
the output control node stabilization portion includes:
a first output control node stabilization switching element having a control terminal to which one of the plurality of clock signals is provided; a first conductive terminal connected to the output control node; and a second conductive terminal to which a scanning signal outputted from an output node of a previous stage is provided, the one of the plurality of clock signals changing from an off level to an on level at timing at which the scanning signal outputted from the output node of the previous stage is to change from an off level to an on level;
a second output control node stabilization switching element having a control terminal to which one of the plurality of clock signals is provided; a first conductive terminal connected to the output control node directly or through another switching element and a second conductive terminal to which a scanning signal outputted from an output node of a subsequent stage is provided, the one of the plurality of clock signals changing from an off level to an on level at timing at which the scanning signal outputted from the output node of the subsequent stage is to change from an off level to an on level;
a third output control node stabilization switching element having a control terminal to which the clock signal provided to the first conductive terminal of the output control switching element is provided; a first conductive terminal connected to the output control node; and a second conductive terminal connected to the first conductive terminal of the second output control node stabilization switching element;
a fourth output control node stabilization switching element having a control terminal to which an initialization signal is provided; a first conductive terminal connected to the output control node; and a second conductive terminal to which an off-level power supply potential is provided, the initialization signal changing from an off level to an on level immediately after a start of a vertical scanning period; and
a fifth output control node stabilization switching element having a control terminal to which the clear signal is provided; a first conductive terminal connected to the output control node; and a second conductive terminal to which an off-level power supply potential is provided, the clear signal changing from an off level to an on level when the vertical scanning period ends.
10. The shift register according to claim 9 , wherein the switching elements included in the stage-forming circuit are thin-film transistors including an oxide semiconductor.
11. The shift register according to claim 10 , wherein the oxide semiconductor is indium gallium zinc oxide.
12. A display device comprising:
a display unit in which a plurality of scanning signal lines is arranged; and
the shift register according to claim 9 , the shift register including a plurality of stages which is provided so as to have a one-to-one correspondence with the plurality of scanning signal lines.