IP Library › Granted Patent US 10,320,288
Granted Patent B2
US 10,320,288 · App. 15/810,923 · Granted Jun 11, 2019

Voltage charge pump with segmented boost capacitors

Inventor: Christopher P Miller (Underhill, VT)
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
H02M3/07G05F5/00
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Quick Facts
Patent No.
US 10,320,288
App. No.
15/810,923
Granted
Jun 11, 2019
Kind
B2
Abstract

A voltage charge pump circuit with boost capacitor segments and boost delay chain structures are provided. The voltage charge pump circuit comprising a plurality of boost capacitor segments each of which is individually controlled by a respective signal line of a boost delay chain structure.

Claims (15)

1. A method comprising enabling of individual boost capacitor segments coordinated with delays to at least one of reduce forward bias and reduce ripple and control output current or voltage, and charging an output PFET device by a boost device in each of the individual boost capacitor segments,

wherein a first line of signal lines of a boost delay structure comprises a NAND gate in series with a first inverter, and

subsequent signal lines of the signal lines of the boost delay structure comprise a pair of inverters in series with a single input and a second NAND gate in series with a second inverter for corresponding boost capacitor segments of the boost delay structure.

2. The method of claim 1 , wherein the individual boost capacitor segments are individually controlled by a respective signal line of the boost delay structure.

3. The method of claim 2 , further comprising controlling individually boost timing of each of the individual boost capacitor segments during a boost phase.

4. The method of claim 3 , further comprising delaying an input boost signal to a subsequent boost capacitor segment.

5. The method of claim 4 , wherein the delayed input boost signal fires each boost capacitor segment at a different time.

6. The method of claim 2 , further comprising providing enable signals for enabling each individual signal line such that, upon activation of an enable signal, a respective one of the individual boost capacitor segments are individually controlled.

7. The method of claim 1 , wherein the individual boost capacitor segments are driven separately to limit over voltage of a boosted node.

8. The method of claim 1 , further comprising coordinating timing control of the individual of boost capacitor segments with digital delays.

9. The method of claim 1 , further comprising distributing boost charge of the individual of boost capacitor segments over time to control pump output current.

10. The method of claim 1 , wherein the boost device in each of the individual boost capacitor segments comprises a boost drive transistor.

11. The method of claim 10 , wherein the boost drive transistor is a NFET.

12. The method of claim 1 , wherein the individual boost capacitor segments are chained together by a boost delay chain which includes the pair of inventors in series.

13. The method of claim 1 , wherein the second NAND gate includes an input which is electrically connected to an enable signal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 13, 2017
From: MILLER, CHRISTOPHER P.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 044110/0472 →
Continuity (3)
Continuation 15236817 · Aug 15, 2016
Continuation 14658809 · Mar 16, 2015
Related Publication 20180069473A1 · Mar 8, 2018