IP Library › Granted Patent US 10,333,004
Granted Patent B2
US 10,333,004 · App. 15/455,637 · Granted Jun 25, 2019

Semiconductor device, semiconductor wafer, module and electronic device

Inventors: Hajime Kimura (Kanagawa, JP); Shunpei Yamazaki (Tokyo, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L29/7869H01L21/0262H01L21/324H01L21/78H01L27/1225
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,333,004
App. No.
15/455,637
Granted
Jun 25, 2019
Kind
B2
Abstract

A semiconductor device including a highly reliable transistor is provided. A semiconductor device includes a transistor. The transistor includes first and second gate electrodes, first and second gate insulators, a source electrode, a drain electrode, first to sixth oxides, first and second layers, and first and second gate insulators. The third oxide is under the source electrode. The fourth oxide is under the drain electrode. The sixth oxide is under the second gate electrode. The third and fourth oxides each have a function of supplying oxygen to the second oxide. The sixth oxide has a function of supplying oxygen to the second gate insulator.

Claims (56)

1. A semiconductor device comprising a transistor, the transistor comprising:

first to fourth conductors;

first to sixth oxides;

first and second layers; and

first and second insulators,

wherein the first insulator comprises a region overlapping with the first conductor,

wherein the first oxide is over the first insulator,

wherein the second oxide is over the first oxide,

wherein the second oxide comprises a first region, a second region, and a third region,

wherein the second region is between the first region and the third region,

wherein the third oxide is over the second oxide,

wherein the second conductor is over the third oxide,

wherein the first layer is over the second conductor,

wherein the third oxide, the second conductor, and the first layer each comprise a region overlapping with the first region,

wherein the fourth oxide is over the second oxide,

wherein the third conductor is over the fourth oxide,

wherein the second layer is over the third conductor,

wherein the fourth oxide, the third conductor, and the second layer each comprise a region overlapping with the third region,

wherein the fifth oxide comprises a region overlapping with the first layer, a region overlapping with the second layer, and a region overlapping with the second region,

wherein the second insulator is over the fifth oxide,

wherein the sixth oxide is over the second insulator,

wherein the fourth conductor is over the sixth oxide, and

wherein the second insulator, the sixth oxide, and the fourth conductor each comprise a region overlapping with the second region.

2. The semiconductor device according to claim 1 , wherein the third oxide, the fourth oxide, and the sixth oxide each comprise a metal oxide.

3. The semiconductor device according to claim 1 , wherein the first oxide, the second oxide, and the fifth oxide each comprise an oxide semiconductor.

4. The semiconductor device according to claim 1 , wherein the first layer and the second layer each comprise a metal and oxygen.

5. A module comprising:

the semiconductor device according to claim 1 ; and

a printed circuit board.

6. An electronic device comprising:

the semiconductor device according to claim 1 ; and

one of a speaker and an operation key.

7. A semiconductor wafer comprising:

the semiconductor device according to claim 1 ; and

a region for dicing.

8. A semiconductor device comprising:

a transistor comprising:

a first oxide;

a second oxide over the first oxide;

source and drain electrodes over the second oxide;

a third oxide over the second oxide and the source and drain electrodes;

a gate insulating layer over the third oxide; and

a gate electrode over the gate insulating layer,

wherein the source and drain electrodes each comprise a fourth oxide and a first conductor over the fourth oxide, and

wherein the gate electrode comprises a fifth oxide and a second conductor over the fifth oxide.

9. The semiconductor device according to claim 8 , wherein the fourth oxide and the fifth oxide each comprise a metal oxide.

10. The semiconductor device according to claim 8 , wherein the first oxide, the second oxide, and the third oxide each comprise an oxide semiconductor.

11. A module comprising:

the semiconductor device according to claim 8 ; and

a printed circuit board.

12. An electronic device comprising:

the semiconductor device according to claim 8 ; and

one of a speaker and an operation key.

13. A semiconductor wafer comprising:

the semiconductor device according to claim 8 ; and

a region for dicing.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 16, 2017
From: KIMURA, HAJIME; YAMAZAKI, SHUNPEI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 041602/0302 →
Priority Claims (1)
JP 2016-056297 · Mar 18, 2016 · national
Continuity (1)
Related Publication 20170271517A1 · Sep 21, 2017
Cited By (5)
US 12,205,892 US 12,224,293 US 12,243,945 US 12,316,991 US 12,672,313