Semiconductor device

1. A semiconductor device, comprising:

a ring oscillator including a plurality of stages of controlled-current driven inverters;

a cumulative-stress-amount holding circuit that holds a cumulative degradation stress count value obtained from an output of the ring oscillator; and

a control circuit including a first voltage generating circuit that controls a current of the controlled-current,

wherein the control circuit controls the controlled-current to emphasize temperature dependency of an oscillation frequency of the ring oscillator, and

wherein the cumulative-stress-amount holding circuit periodically obtains p-th power of the oscillation frequency of the ring oscillator and accumulates the p-th power of the oscillation frequency of the ring oscillator.

2. A semiconductor device according to claim 1 , wherein the control circuit controls the controlled-current to further emphasize voltage dependency of the oscillation frequency of the ring oscillator.

3. The device according to claim 2 , wherein the control circuit controls so that the oscillation frequency of the ring oscillator depends on a power of a power supply voltage and an exponential of an inverse of a temperature.

4. The device according to claim 2 , wherein the first voltage generating circuit includes a first output line of outputting a first voltage between the power supply voltage supplied to a power supply line and a reference voltage supplied to a reference line, and

a second output line of outputting a second voltage between the power supply voltage and the reference voltage, and

wherein each of the plural stages of the inverters includes

a controlled-current PMOS transistor with a source thereof coupled to the power supply line and a gate thereof coupled to the second output line, and

a controlled-current NMOS transistor with a source thereof coupled to the reference line and a gate thereof coupled to the first output line.

5. The device according to claim 4 , wherein in a normal operation voltage,

the first voltage is a voltage less than ½ of the power supply voltage, and

the second voltage is a voltage more than ½ of the power supply voltage.

6. The device according to claim 4 , wherein the oscillation frequency of the ring oscillator has a dependency close to a power of the power supply voltage and a dependency close to an exponential of an inverse of a temperature.

7. The device according to claim 4 , wherein the first voltage generating circuit includes a first PMOS transistor coupled between the power supply line and the first output line, and

a first NMOS transistor coupled between the reference line and the second output line.

8. The device according to claim 7 , wherein the control circuit further includes a second voltage generating circuit that controls the first voltage generating circuit,

wherein the second voltage generating circuit includes

a third output line of outputting a third voltage between the power supply voltage supplied to the power supply line and the reference voltage supplied to the reference line, and

a fourth output line of outputting a fourth voltage between the power supply voltage and the reference voltage,

wherein the third output line and the fourth output line are coupled to the first voltage generating circuit.

9. The device according to claim 8 , wherein the third voltage is higher than the fourth voltage,

wherein the third voltage has a positive temperature dependency, and

wherein the fourth voltage has a negative temperature dependency.

10. A semiconductor device comprising

a ring oscillator, and

a cumulative-stress-amount holding circuit that holds a cumulative degradation stress count value obtained from consecutive accumulation of an oscillation output of the ring oscillator,

wherein an oscillation frequency of the ring oscillator is set to be emphasized by not a voltage dependency but a temperature dependency, and

wherein the oscillation frequency of the ring oscillator is substantially in proportion to leakage current.

11. A semiconductor device according to claim 10 , wherein the cumulative-stress-amount holding circuit periodically obtains p-th power of the oscillation frequency of the ring oscillator and accumulates the p-th power of the oscillation frequency of the ring oscillator.

12. The device according to claim 11 , wherein the oscillation frequency of the ring oscillator depends on an exponential of an inverse of a temperature.

13. The device according to claim 11 , wherein the ring oscillator forms a loop by a plurality of stages of delay inverters and a delay circuit,

wherein the delay circuit includes a leakage type pull-up element coupled to the plurality of stages of delay inverters, and

wherein a time when the output of the leakage type pull-up element changes from a low level to a high level is larger than a delay time of the plurality of stages of delay inverters.

14. The device according to claim 13 , wherein the leakage type pull-up element comprises a PMOS transistor and the oscillation frequency of the ring oscillator has an exponential dependence on an inverse of a temperature.

15. A semiconductor device, comprising:

a ring oscillator; and

a cumulative-stress-amount holding circuit that holds a cumulative degradation stress count value obtained from an output of the ring oscillator,

wherein the cumulative degradation stress count value is used to generate a cumulative degradation stress alarm by comparing with a count value of criteria, and

wherein the cumulative-stress-amount holding circuit periodically obtains p-th power of the oscillation frequency of the ring oscillator and accumulates the p-th power of the oscillation frequency of the ring oscillator.

16. The device according to claim 15 , wherein the cumulative-stress-amount holding circuit includes

a counter that counts the output oscillation of the ring oscillator or an output obtained by dividing the output frequency of the ring oscillator,

a p-th power calculating circuit that calculates a p-th power of the counter value, and

a p-th power accumulating circuit that accumulates the calculation result of the p-th power calculating circuit.

17. The device according to claim 16 , wherein the p-th power accumulating circuit includes a non-volatile recording circuit.

18. The device according to claim 16 , wherein the p-th power accumulating circuit is arranged in an area where power is not shut off.

19. The device according to claim 15 , wherein the ring oscillator includes

a plurality of stages of controlled-current driven inverters, and

a voltage generating circuit which controls a current of the controlled-current,

wherein the oscillation frequency of the ring oscillator has a dependency close to a power of the power supply voltage and a dependency close to an exponential of an inverse of temperature.

20. The device according to claim 15 , wherein the ring oscillator includes

plural stages of inverters that form a loop, and

a delay circuit that delays the loop of the plural stages of the inverters,

wherein the oscillation frequency of the ring oscillator has a dependency close to an exponential of an inverse of a temperature.